diff options
| author | David Gibson <david@gibson.dropbear.id.au> | 2011-04-01 15:15:08 +1100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-04-01 18:34:54 +0200 |
| commit | 81762d6dd0d430d87024f2c83e9c4dcc4329fb7d (patch) | |
| tree | bd081fa7949a578cc91b6aba958cf14a78c108a8 /target-ppc/op_helper.c | |
| parent | 17d9b3af5b7f93e43d7fbdcb6f14cad54de9f1ae (diff) | |
| download | qemu-81762d6dd0d430d87024f2c83e9c4dcc4329fb7d.tar.gz | |
Clean up PowerPC SLB handling code
Currently the SLB information when emulating a PowerPC 970 is
storeed in a structure with the unhelpfully named fields 'tmp'
and 'tmp64'. While the layout in these fields does match the
description of the SLB in the architecture document, it is not
convenient either for looking up the SLB, or for emulating the
slbmte instruction.
This patch, therefore, reorganizes the SLB entry structure to be
divided in the the "ESID related" and "VSID related" fields as
they are divided in instructions accessing the SLB.
In addition to making the code smaller and more readable, this will
make it easier to implement for the 1TB segments used in more
recent PowerPC chips.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/op_helper.c')
| -rw-r--r-- | target-ppc/op_helper.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 17e070ae75..bf41627b21 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -3746,14 +3746,11 @@ void helper_store_sr (target_ulong sr_num, target_ulong val) /* SLB management */ #if defined(TARGET_PPC64) -target_ulong helper_load_slb (target_ulong slb_nr) -{ - return ppc_load_slb(env, slb_nr); -} - void helper_store_slb (target_ulong rb, target_ulong rs) { - ppc_store_slb(env, rb, rs); + if (ppc_store_slb(env, rb, rs) < 0) { + helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL); + } } void helper_slbia (void) |