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| author | Alexander Graf <agraf@suse.de> | 2012-01-31 03:18:35 +0100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2012-02-02 02:47:47 +0100 |
| commit | 9e0b5cb1ecf5543864fad0628a17be23bb617ed7 (patch) | |
| tree | 96d5d130a7e73b4ed44e56b6e88a2a34098dd3a6 /target-ppc/op_helper.c | |
| parent | a9abd71770e64d22ba6cb40c30e4c35998e5c743 (diff) | |
| download | qemu-9e0b5cb1ecf5543864fad0628a17be23bb617ed7.tar.gz | |
PPC: E500: Implement msgclr
This patch implements the msgclr instruction. It is part of the
Embedded.Processor Control specification and clears pending doorbell
interrupts on the current CPU.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/op_helper.c')
| -rw-r--r-- | target-ppc/op_helper.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 0d1206a649..e2f7614c27 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -4514,4 +4514,39 @@ void helper_booke206_tlbflush(uint32_t type) booke206_flush_tlb(env, flags, 1); } +/* Embedded.Processor Control */ +static int dbell2irq(target_ulong rb) +{ + int msg = rb & DBELL_TYPE_MASK; + int irq = -1; + + switch (msg) { + case DBELL_TYPE_DBELL: + irq = PPC_INTERRUPT_DOORBELL; + break; + case DBELL_TYPE_DBELL_CRIT: + irq = PPC_INTERRUPT_CDOORBELL; + break; + case DBELL_TYPE_G_DBELL: + case DBELL_TYPE_G_DBELL_CRIT: + case DBELL_TYPE_G_DBELL_MC: + /* XXX implement */ + default: + break; + } + + return irq; +} + +void helper_msgclr(target_ulong rb) +{ + int irq = dbell2irq(rb); + + if (irq < 0) { + return; + } + + env->pending_interrupts &= ~(1 << irq); +} + #endif /* !CONFIG_USER_ONLY */ |