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authorDavid Gibson <david@gibson.dropbear.id.au>2016-01-28 10:31:04 +1100
committerDavid Gibson <david@gibson.dropbear.id.au>2016-01-30 23:49:26 +1100
commit4693364f31016cc08d79d1673c3f735a4f95fd89 (patch)
tree5dcb7a1f0c048270470d5985654808d3bc16bc8e /target-ppc/translate.c
parent041d95f42e39ed1d3a029332cab9966889f0aeb3 (diff)
downloadqemu-4693364f31016cc08d79d1673c3f735a4f95fd89.tar.gz
target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one()
Currently both the tlbiva instruction (used on 44x chips) and the tlbie instruction (used on hash MMU chips) are both handled via ppc_tlb_invalidate_one(). This is silly, because they're invoked from different places, and do different things. Clean this up by separating out the tlbiva instruction into its own handling. In fact the implementation is only a stub anyway. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r--target-ppc/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 3beeb452a8..0219d38ace 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -5905,7 +5905,7 @@ static void gen_tlbiva(DisasContext *ctx)
}
t0 = tcg_temp_new();
gen_addr_reg_index(ctx, t0);
- gen_helper_tlbie(cpu_env, cpu_gpr[rB(ctx->opcode)]);
+ gen_helper_tlbiva(cpu_env, cpu_gpr[rB(ctx->opcode)]);
tcg_temp_free(t0);
#endif
}