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| author | Tom Musta <tommusta@gmail.com> | 2014-12-18 10:34:34 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2015-01-07 16:16:27 +0100 |
| commit | 0ff93d11bc0890b2569f748266c04f4417ec3233 (patch) | |
| tree | 4c3f6c045177abb53bcfe57a6ec166f3d307892e /target-ppc/translate.c | |
| parent | aac862379ceaa724aba2ba9f4b825479c1401b1a (diff) | |
| download | qemu-0ff93d11bc0890b2569f748266c04f4417ec3233.tar.gz | |
target-ppc: Introduce tbegin
Provide a degenerate implementation of the tbegin instruction. This
implementation always fails the transaction, recording the failure
per Book II Section 5.3.2 of the Power ISA V2.07.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 3b004f3bf7..f4a0332ca9 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -9674,6 +9674,15 @@ GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_DOUBLE GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, 0x00600000, PPC_SPE_DOUBLE); // GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, 0xFFFFFFFF, PPC_SPE_DOUBLE); // +static void gen_tbegin(DisasContext *ctx) +{ + if (unlikely(!ctx->tm_enabled)) { + gen_exception_err(ctx, POWERPC_EXCP_FU, FSCR_IC_TM); + return; + } + gen_helper_tbegin(cpu_env); +} + static opcode_t opcodes[] = { GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE), GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER), @@ -11086,6 +11095,9 @@ GEN_SPEOP_LDST(evstwhe, 0x18, 2), GEN_SPEOP_LDST(evstwho, 0x1A, 2), GEN_SPEOP_LDST(evstwwe, 0x1C, 2), GEN_SPEOP_LDST(evstwwo, 0x1E, 2), + +GEN_HANDLER2_E(tbegin, "tbegin", 0x1F, 0x0E, 0x14, 0x01DFF800, \ + PPC_NONE, PPC2_TM), }; #include "helper_regs.h" |