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authorCédric Le Goater <clg@fr.ibm.com>2014-02-04 18:21:39 +0100
committerAlexander Graf <agraf@suse.de>2014-03-05 03:06:25 +0100
commit363248e8c92c6331253e2a768884c69183805050 (patch)
tree6fbc93ee17afab3f7efdf6c69dd496169d2fad80 /target-ppc/translate_init.c
parent0dc083fe10c5cc848f36498b9157a336cbc8c7c1 (diff)
downloadqemu-363248e8c92c6331253e2a768884c69183805050.tar.gz
mmu-hash64: fix Virtual Page Class Key Protection
commit f80872e21c07edd06eb343eeeefc8af404b518a6 (mmu-hash64: Implement Virtual Page Class Key Protection) added a new page protection mechanism based on page keys and the AMR register to control access. The AMR register allows or prohibits reads and/or writes on a page depending on the control bits associated to the key. A store or a load is only permitted if the associate bit is 0 (Power ISA), and not 1 as the code is currently doing. This patch modifies ppc_hash64_amr_prot() to correct the protection check. This issue was unvailed by commit ccfb53ed6360cac0d5f6f7915ca9ae7eed866412 (target-ppc: fix Authority Mask Register init value) which changed the initialisation value of the AMR register to 0. Signed-off-by: Cédric Le Goater <clg@fr.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate_init.c')
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