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| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-17 22:42:36 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-17 22:42:36 +0000 |
| commit | b4095fed95235c95b04b2337ec29947f509af3bc (patch) | |
| tree | 5bef3315a5e9e65c362d32f0494c8b6d1b08cfd8 /target-ppc/translate_init.c | |
| parent | 05332d70fd7488459e4b80c73ff7547b3a1a7ce6 (diff) | |
| download | qemu-b4095fed95235c95b04b2337ec29947f509af3bc.tar.gz | |
Define Freescale cores specific MMU model, exceptions and input bus.
(but do not provide any actual implementation).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3680 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate_init.c')
| -rw-r--r-- | target-ppc/translate_init.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 0f7441ee56..343ec130af 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -2656,7 +2656,7 @@ static int check_pow_hid0 (CPUPPCState *env) PPC_MEM_SYNC | PPC_MEM_EIEIO | \ PPC_4xx_COMMON | PPC_40x_EXCP | PPC_40x_ICBT) #define POWERPC_MSRM_401 (0x00000000000FD201ULL) -#define POWERPC_MMU_401 (POWERPC_MMU_REAL_4xx) +#define POWERPC_MMU_401 (POWERPC_MMU_REAL) #define POWERPC_EXCP_401 (POWERPC_EXCP_40x) #define POWERPC_INPUT_401 (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_401 (bfd_mach_ppc_403) @@ -2775,7 +2775,7 @@ static void init_proc_IOP480 (CPUPPCState *env) PPC_MEM_SYNC | PPC_MEM_EIEIO | \ PPC_4xx_COMMON | PPC_40x_EXCP | PPC_40x_ICBT) #define POWERPC_MSRM_403 (0x000000000007D00DULL) -#define POWERPC_MMU_403 (POWERPC_MMU_REAL_4xx) +#define POWERPC_MMU_403 (POWERPC_MMU_REAL) #define POWERPC_EXCP_403 (POWERPC_EXCP_40x) #define POWERPC_INPUT_403 (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_403 (bfd_mach_ppc_403) @@ -6639,8 +6639,11 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def) mmu_model = "PowerPC 4xx with software driven TLBs " "and zones protections"; break; - case POWERPC_MMU_REAL_4xx: - mmu_model = "PowerPC 4xx real mode only"; + case POWERPC_MMU_REAL: + mmu_model = "PowerPC real mode only"; + break; + case POWERPC_MMU_MPC8xx: + mmu_model = "PowerPC MPC8xx"; break; case POWERPC_MMU_BOOKE: mmu_model = "PowerPC BookE"; @@ -6648,6 +6651,9 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def) case POWERPC_MMU_BOOKE_FSL: mmu_model = "PowerPC BookE FSL"; break; + case POWERPC_MMU_601: + mmu_model = "PowerPC 601"; + break; #if defined (TARGET_PPC64) case POWERPC_MMU_64B: mmu_model = "PowerPC 64"; @@ -6713,6 +6719,9 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def) case PPC_FLAGS_INPUT_401: bus_model = "PowerPC 401/403"; break; + case PPC_FLAGS_INPUT_RCPU: + bus_model = "RCPU / MPC8xx"; + break; #if defined (TARGET_PPC64) case PPC_FLAGS_INPUT_970: bus_model = "PowerPC 970"; |