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authorAlexander Graf <agraf@suse.de>2013-01-04 11:21:04 +0100
committerAlexander Graf <agraf@suse.de>2013-01-07 17:37:11 +0100
commit68c2dd70068fe82a1989d0d5b70a1ab400bde19a (patch)
treee9be2de2931bf374beb4914b33f214d31dfec0c2 /target-ppc/translate_init.c
parent1a61a9ae61cdf7b7d24c3eb711fe772c196c235e (diff)
downloadqemu-68c2dd70068fe82a1989d0d5b70a1ab400bde19a.tar.gz
PPC: Bring EPR support closer to reality
We already used to support the external proxy facility of FSL MPICs, but only implemented it halfway correctly. This patch adds support for * dynamic enablement of the EPR facility * interrupt acknowledgement only when the interrupt is delivered This way the implementation now is closer to real hardware. Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate_init.c')
-rw-r--r--target-ppc/translate_init.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 42ed748b59..e2eeb87650 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -4493,11 +4493,6 @@ static void spr_read_mas73(void *opaque, int gprn, int sprn)
tcg_temp_free(mas7);
}
-static void spr_load_epr(void *opaque, int gprn, int sprn)
-{
- gen_helper_load_epr(cpu_gpr[gprn], cpu_env);
-}
-
#endif
enum fsl_e500_version {
@@ -4656,7 +4651,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
0x00000000);
spr_register(env, SPR_BOOKE_EPR, "EPR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_load_epr, SPR_NOACCESS,
+ &spr_read_generic, SPR_NOACCESS,
0x00000000);
/* XXX better abstract into Emb.xxx features */
if (version == fsl_e5500) {