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| author | Tom Musta <tommusta@gmail.com> | 2014-05-29 09:12:22 -0500 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:40 +0200 |
| commit | 5b274ed74d21929c5ec399b32f47ad46105b3721 (patch) | |
| tree | cdbdb3eb4016893e6d806640d7f0945e04ca3fb9 /target-ppc | |
| parent | 9c35126c56de54d0505ac7676ca4699af1d205bf (diff) | |
| download | qemu-5b274ed74d21929c5ec399b32f47ad46105b3721.tar.gz | |
target-ppc: Support VSX in PPC User Mode
Some modern tool chains use VSX instructions. Therefore attempt to enable the VSX MSR
bit by default, just like similar bits (FP, VEC, SPE, etc.).
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/translate_init.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5f5a8ad7c6..d764bbdbf0 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -9313,6 +9313,7 @@ static void ppc_cpu_reset(CPUState *s) #if defined(CONFIG_USER_ONLY) msr |= (target_ulong)1 << MSR_FP; /* Allow floating point usage */ msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */ + msr |= (target_ulong)1 << MSR_VSX; /* Allow VSX usage */ msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */ msr |= (target_ulong)1 << MSR_PR; #if !defined(TARGET_WORDS_BIGENDIAN) |