diff options
| author | Tom Musta <tommusta@gmail.com> | 2014-01-07 10:05:58 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:41 +0100 |
| commit | 1b0bd0029f16649a7f3d8ba021191bc6ca3a471f (patch) | |
| tree | b4dc78b064c3caa9251ff5cdc946cea2a777d646 /target-ppc | |
| parent | 587c51f74bcf2f9aa03b7d8e1cff229f74d02860 (diff) | |
| download | qemu-1b0bd0029f16649a7f3d8ba021191bc6ca3a471f.tar.gz | |
target-ppc: Add Flag for ISA V2.06 Floating Point Conversion
This patch adds a flag for the floating point conversion instructions
introduced in Power ISA 2.06B.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/cpu.h | 5 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 6 |
2 files changed, 7 insertions, 4 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index bf2b64fd8c..1dbeb81430 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1883,11 +1883,14 @@ enum { PPC2_DIVE_ISA206 = 0x0000000000000100ULL, /* ISA 2.06B larx/stcx. instructions */ PPC2_ATOMIC_ISA206 = 0x0000000000000200ULL, + /* ISA 2.06B floating point integer conversion */ + PPC2_FP_CVT_ISA206 = 0x0000000000000400ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ - PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206) + PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \ + PPC2_FP_CVT_ISA206) }; /*****************************************************************************/ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index abe0a2147f..6dd0f84dac 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7070,7 +7070,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) PPC_POPCNTB | PPC_POPCNTWD; pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 | PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | - PPC2_ATOMIC_ISA206; + PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206; pcc->msr_mask = 0x800000000284FF37ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU) @@ -7110,7 +7110,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data) PPC_POPCNTB | PPC_POPCNTWD; pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 | PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | - PPC2_ATOMIC_ISA206; + PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206; pcc->msr_mask = 0x800000000204FF37ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU) @@ -7150,7 +7150,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) PPC_POPCNTB | PPC_POPCNTWD; pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX | PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | - PPC2_ATOMIC_ISA206; + PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206; pcc->msr_mask = 0x800000000284FF36ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU) |