diff options
| author | Tom Musta <tommusta@gmail.com> | 2014-01-15 08:10:44 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:37 +0100 |
| commit | 3d1140bf3e73e4fd244914bdf2867fe634759c71 (patch) | |
| tree | c3fcbc03b47f63c5e98b8d32c42a6b0112caf4e0 /target-ppc | |
| parent | 097ec5d850df7dd1da87220726ce87a6ab3566c4 (diff) | |
| download | qemu-3d1140bf3e73e4fd244914bdf2867fe634759c71.tar.gz | |
target-ppc: Scalar Round to Single Precision
This patch adds the VSX Scalar Round to Single Precision (xsrsp)
instruction.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/fpu_helper.c | 11 | ||||
| -rw-r--r-- | target-ppc/helper.h | 1 | ||||
| -rw-r--r-- | target-ppc/translate.c | 17 |
3 files changed, 29 insertions, 0 deletions
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c index 1dfb3c0272..c35135eb8e 100644 --- a/target-ppc/fpu_helper.c +++ b/target-ppc/fpu_helper.c @@ -2666,3 +2666,14 @@ VSX_ROUND(xvrspic, 4, float32, f32, FLOAT_ROUND_CURRENT, 0) VSX_ROUND(xvrspim, 4, float32, f32, float_round_down, 0) VSX_ROUND(xvrspip, 4, float32, f32, float_round_up, 0) VSX_ROUND(xvrspiz, 4, float32, f32, float_round_to_zero, 0) + +uint64_t helper_xsrsp(CPUPPCState *env, uint64_t xb) +{ + helper_reset_fpstatus(env); + + uint64_t xt = helper_frsp(env, xb); + + helper_compute_fprf(env, xt, 1); + helper_float_check_status(env); + return xt; +} diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 6250ebab3e..16545896f0 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -293,6 +293,7 @@ DEF_HELPER_2(xssubsp, void, env, i32) DEF_HELPER_2(xsmulsp, void, env, i32) DEF_HELPER_2(xsdivsp, void, env, i32) DEF_HELPER_2(xsresp, void, env, i32) +DEF_HELPER_2(xsrsp, i64, env, i64) DEF_HELPER_2(xssqrtsp, void, env, i32) DEF_HELPER_2(xsrsqrtesp, void, env, i32) DEF_HELPER_2(xsmaddasp, void, env, i32) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index c6a357a7ef..c307f2463d 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7400,6 +7400,21 @@ static void gen_##name(DisasContext * ctx) \ tcg_temp_free_i32(opc); \ } +#define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \ +static void gen_##name(DisasContext * ctx) \ +{ \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + /* NIP cannot be restored if the exception comes */ \ + /* from a helper. */ \ + gen_update_nip(ctx, ctx->nip - 4); \ + \ + gen_helper_##name(cpu_vsrh(xT(ctx->opcode)), cpu_env, \ + cpu_vsrh(xB(ctx->opcode))); \ +} + GEN_VSX_HELPER_2(xsadddp, 0x00, 0x04, 0, PPC2_VSX) GEN_VSX_HELPER_2(xssubdp, 0x00, 0x05, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsmuldp, 0x00, 0x06, 0, PPC2_VSX) @@ -7434,6 +7449,7 @@ GEN_VSX_HELPER_2(xsrdpic, 0x16, 0x06, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsrdpim, 0x12, 0x07, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsrdpip, 0x12, 0x06, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsrdpiz, 0x12, 0x05, 0, PPC2_VSX) +GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207) @@ -10277,6 +10293,7 @@ GEN_XX3FORM(xssubsp, 0x00, 0x01, PPC2_VSX207), GEN_XX3FORM(xsmulsp, 0x00, 0x02, PPC2_VSX207), GEN_XX3FORM(xsdivsp, 0x00, 0x03, PPC2_VSX207), GEN_XX2FORM(xsresp, 0x14, 0x01, PPC2_VSX207), +GEN_XX2FORM(xsrsp, 0x12, 0x11, PPC2_VSX207), GEN_XX2FORM(xssqrtsp, 0x16, 0x00, PPC2_VSX207), GEN_XX2FORM(xsrsqrtesp, 0x14, 0x00, PPC2_VSX207), GEN_XX3FORM(xsmaddasp, 0x04, 0x00, PPC2_VSX207), |