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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-21 05:23:26 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-21 05:23:26 +0000
commit4296f45902536506369cc9c9c329d6680fa3f1a9 (patch)
tree5a4dc713a8aa05ab455adafac6a0ad1718a0239f /target-ppc
parentc068688b03f4af8994ba0d7bd41a74c8f245453b (diff)
downloadqemu-4296f45902536506369cc9c9c329d6680fa3f1a9.tar.gz
Make CPU hflags be a masked version of the PowerPC MSR.
As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu.h2
-rw-r--r--target-ppc/helper.c7
2 files changed, 5 insertions, 4 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 3ca22e57b9..e2cf956b4a 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -807,7 +807,7 @@ struct CPUPPCState {
/* Those resources are used only in Qemu core */
jmp_buf jmp_env;
int user_mode_only; /* user mode only simulation */
- uint32_t hflags;
+ target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */
/* Power management */
int power_mode;
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 80315f6de2..534ad6b5d3 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1776,13 +1776,14 @@ void ppc_store_msr_32 (CPUPPCState *env, uint32_t value)
void do_compute_hflags (CPUPPCState *env)
{
/* Compute current hflags */
- env->hflags = (msr_cm << MSR_CM) | (msr_vr << MSR_VR) |
+ env->hflags = (msr_vr << MSR_VR) |
(msr_ap << MSR_AP) | (msr_sa << MSR_SA) | (msr_pr << MSR_PR) |
(msr_fp << MSR_FP) | (msr_fe0 << MSR_FE0) | (msr_se << MSR_SE) |
(msr_be << MSR_BE) | (msr_fe1 << MSR_FE1) | (msr_le << MSR_LE);
#if defined (TARGET_PPC64)
- /* No care here: PowerPC 64 MSR_SF means the same as MSR_CM for BookE */
- env->hflags |= (msr_sf << (MSR_SF - 32)) | (msr_hv << (MSR_HV - 32));
+ env->hflags |= msr_cm << MSR_CM;
+ env->hflags |= (uint64_t)msr_sf << MSR_SF;
+ env->hflags |= (uint64_t)msr_hv << MSR_HV;
#endif
}