diff options
| author | Tom Musta <tommusta@gmail.com> | 2014-01-07 10:05:53 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:39 +0100 |
| commit | 6a4fda3358ca5a21e17d553074f74d512745c4f6 (patch) | |
| tree | 559d41bc2d46d7e1abfcc070cfd17a6c30811e2b /target-ppc | |
| parent | e44259b6d4f4de69a868510a198b2696f24118a1 (diff) | |
| download | qemu-6a4fda3358ca5a21e17d553074f74d512745c4f6.tar.gz | |
target-ppc: Add ISA 2.06 divweu[o] Instructions
This patch addes the Unsigned Divide Word Extended instructions
which were introduced in Power ISA 2.06B.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/helper.h | 1 | ||||
| -rw-r--r-- | target-ppc/int_helper.c | 31 | ||||
| -rw-r--r-- | target-ppc/translate.c | 5 |
3 files changed, 37 insertions, 0 deletions
diff --git a/target-ppc/helper.h b/target-ppc/helper.h index a09a6181b4..52e49f1f0e 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -34,6 +34,7 @@ DEF_HELPER_3(mulldo, i64, env, i64, i64) DEF_HELPER_4(divdeu, i64, env, i64, i64, i32) DEF_HELPER_4(divde, i64, env, i64, i64, i32) #endif +DEF_HELPER_4(divweu, tl, env, tl, tl, i32) DEF_HELPER_FLAGS_1(cntlzw, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 920dba7891..45586be27c 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -41,6 +41,37 @@ uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2) } #endif +target_ulong helper_divweu(CPUPPCState *env, target_ulong ra, target_ulong rb, + uint32_t oe) +{ + uint64_t rt = 0; + int overflow = 0; + + uint64_t dividend = (uint64_t)ra << 32; + uint64_t divisor = (uint32_t)rb; + + if (unlikely(divisor == 0)) { + overflow = 1; + } else { + rt = dividend / divisor; + overflow = rt > UINT32_MAX; + } + + if (unlikely(overflow)) { + rt = 0; /* Undefined */ + } + + if (oe) { + if (unlikely(overflow)) { + env->so = env->ov = 1; + } else { + env->ov = 0; + } + } + + return (target_ulong)rt; +} + #if defined(TARGET_PPC64) uint64_t helper_divdeu(CPUPPCState *env, uint64_t ra, uint64_t rb, uint32_t oe) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 7751b294bc..e361d49689 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -998,6 +998,9 @@ static void gen_##name(DisasContext *ctx) \ } \ } +GEN_DIVE(divweu, divweu, 0); +GEN_DIVE(divweuo, divweu, 1); + #if defined(TARGET_PPC64) static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int sign, int compute_ov) @@ -9716,6 +9719,8 @@ GEN_INT_ARITH_DIVW(divwu, 0x0E, 0, 0), GEN_INT_ARITH_DIVW(divwuo, 0x1E, 0, 1), GEN_INT_ARITH_DIVW(divw, 0x0F, 1, 0), GEN_INT_ARITH_DIVW(divwo, 0x1F, 1, 1), +GEN_HANDLER_E(divweu, 0x1F, 0x0B, 0x0C, 0, PPC_NONE, PPC2_DIVE_ISA206), +GEN_HANDLER_E(divweuo, 0x1F, 0x0B, 0x1C, 0, PPC_NONE, PPC2_DIVE_ISA206), #if defined(TARGET_PPC64) #undef GEN_INT_ARITH_DIVD |