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| author | Tom Musta <tommusta@gmail.com> | 2014-02-12 15:22:54 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:52 +0100 |
| commit | 9b47bb490c1b272c16b8f5e216b74456a3e17322 (patch) | |
| tree | 2cfe666d84e60d930b6ea3b7daca8a7d03f13472 /target-ppc | |
| parent | bb5275338daf1b64bf9677e0361057cfa6ff6a7d (diff) | |
| download | qemu-9b47bb490c1b272c16b8f5e216b74456a3e17322.tar.gz | |
target-ppc: Altivec 2.07: Add GEN_VXFORM3
This patch adds generator macro for Altivec instructions that have 3
source AVR operands. The macro is similar to the 2 operand form.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/translate.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 5839b6c5dd..85dad7fa0c 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6885,6 +6885,25 @@ static void glue(gen_, name)(DisasContext *ctx) \ tcg_temp_free_ptr(rd); \ } +#define GEN_VXFORM3(name, opc2, opc3) \ +static void glue(gen_, name)(DisasContext *ctx) \ +{ \ + TCGv_ptr ra, rb, rc, rd; \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + ra = gen_avr_ptr(rA(ctx->opcode)); \ + rb = gen_avr_ptr(rB(ctx->opcode)); \ + rc = gen_avr_ptr(rC(ctx->opcode)); \ + rd = gen_avr_ptr(rD(ctx->opcode)); \ + gen_helper_##name(rd, ra, rb, rc); \ + tcg_temp_free_ptr(ra); \ + tcg_temp_free_ptr(rb); \ + tcg_temp_free_ptr(rc); \ + tcg_temp_free_ptr(rd); \ +} + GEN_VXFORM(vaddubm, 0, 0); GEN_VXFORM(vadduhm, 0, 1); GEN_VXFORM(vadduwm, 0, 2); |