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authorDavid Gibson <david@gibson.dropbear.id.au>2011-09-29 21:39:10 +0000
committerAlexander Graf <agraf@suse.de>2011-10-30 17:11:53 +0100
commite97c363638b32943afc4bd2845f4081496fabfbc (patch)
treefefb166bb145fce87486ccd7f82c66c03162dfd1 /target-ppc
parenteeae2e7b52255dae0976a027b6e11274990c708d (diff)
downloadqemu-e97c363638b32943afc4bd2845f4081496fabfbc.tar.gz
pseries: Support SMT systems for KVM Book3S-HV
Alex Graf has already made qemu support KVM for the pseries machine when using the Book3S-PR KVM variant (which runs the guest in usermode, emulating supervisor operations). This code allows gets us very close to also working with KVM Book3S-HV (using the hypervisor capabilities of recent POWER CPUs). This patch moves us another step towards Book3S-HV support by correctly handling SMT (multithreaded) POWER CPUs. There are two parts to this: * Querying KVM to check SMT capability, and if present, adjusting the cpu numbers that qemu assigns to cause KVM to assign guest threads to cores in the right way (this isn't automatic, because the POWER HV support has a limitation that different threads on a single core cannot be in different guests at the same time). * Correctly informing the guest OS of the SMT thread to core mappings via the device tree. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/helper.c11
-rw-r--r--target-ppc/kvm.c8
-rw-r--r--target-ppc/kvm_ppc.h6
3 files changed, 25 insertions, 0 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 6339be3a75..137a494201 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -26,6 +26,8 @@
#include "helper_regs.h"
#include "qemu-common.h"
#include "kvm.h"
+#include "kvm_ppc.h"
+#include "cpus.h"
//#define DEBUG_MMU
//#define DEBUG_BATS
@@ -3189,6 +3191,15 @@ CPUPPCState *cpu_ppc_init (const char *cpu_model)
if (tcg_enabled()) {
ppc_translate_init();
}
+ /* Adjust cpu index for SMT */
+#if !defined(CONFIG_USER_ONLY)
+ if (kvm_enabled()) {
+ int smt = kvmppc_smt_threads();
+
+ env->cpu_index = (env->cpu_index / smp_threads)*smt
+ + (env->cpu_index % smp_threads);
+ }
+#endif /* !CONFIG_USER_ONLY */
env->cpu_model_str = cpu_model;
cpu_ppc_register_internal(env, def);
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 75832d83b8..6c7ca6fc50 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -28,6 +28,7 @@
#include "kvm_ppc.h"
#include "cpu.h"
#include "device_tree.h"
+#include "hw/spapr.h"
#include "hw/sysbus.h"
#include "hw/spapr.h"
@@ -53,6 +54,7 @@ static int cap_interrupt_unset = false;
static int cap_interrupt_level = false;
static int cap_segstate;
static int cap_booke_sregs;
+static int cap_ppc_smt;
/* XXX We have a race condition where we actually have a level triggered
* interrupt, but the infrastructure can't expose that yet, so the guest
@@ -76,6 +78,7 @@ int kvm_arch_init(KVMState *s)
cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL);
cap_segstate = kvm_check_extension(s, KVM_CAP_PPC_SEGSTATE);
cap_booke_sregs = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_SREGS);
+ cap_ppc_smt = kvm_check_extension(s, KVM_CAP_PPC_SMT);
if (!cap_interrupt_level) {
fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
@@ -750,6 +753,11 @@ fail:
cpu_abort(env, "This KVM version does not support PAPR\n");
}
+int kvmppc_smt_threads(void)
+{
+ return cap_ppc_smt ? cap_ppc_smt : 1;
+}
+
bool kvm_arch_stop_on_emulation_error(CPUState *env)
{
return true;
diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
index c484e60bcb..c298411aa8 100644
--- a/target-ppc/kvm_ppc.h
+++ b/target-ppc/kvm_ppc.h
@@ -18,6 +18,7 @@ uint64_t kvmppc_get_clockfreq(void);
int kvmppc_get_hypercall(CPUState *env, uint8_t *buf, int buf_len);
int kvmppc_set_interrupt(CPUState *env, int irq, int level);
void kvmppc_set_papr(CPUState *env);
+int kvmppc_smt_threads(void);
#else
@@ -45,6 +46,11 @@ static inline void kvmppc_set_papr(CPUState *env)
{
}
+static inline int kvmppc_smt_threads(void)
+{
+ return 1;
+}
+
#endif
#ifndef CONFIG_KVM