diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-03-21 13:52:35 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-03-24 11:17:34 +1100 |
| commit | 21a558bed91f363ea8fc3f9a95b222a0949c70e7 (patch) | |
| tree | 1bdb5b5b90c060c332c0b0476c82dc602aa219cb /target-ppc | |
| parent | 26a7f1291bb5581e51c413d744207d0a5910ff4c (diff) | |
| download | qemu-21a558bed91f363ea8fc3f9a95b222a0949c70e7.tar.gz | |
ppc: Add dummy SPR_IC for POWER8
It's supposed to be an instruction counter. For now make us not
crash when accessing it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/cpu.h | 1 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 12 |
2 files changed, 13 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index a7da0d3e95..167c73f863 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1685,6 +1685,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_MPC_MD_DBRAM1 (0x32A) #define SPR_RCPU_L2U_RA3 (0x32B) #define SPR_TAR (0x32F) +#define SPR_IC (0x350) #define SPR_VTB (0x351) #define SPR_MMCRC (0x353) #define SPR_440_INV0 (0x370) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 4d82e1c756..3a13ad7f90 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7924,6 +7924,17 @@ static void gen_spr_power8_pspb(CPUPPCState *env) KVM_REG_PPC_PSPB, 0); } +static void gen_spr_power8_ic(CPUPPCState *env) +{ +#if !defined(CONFIG_USER_ONLY) + spr_register_hv(env, SPR_IC, "IC", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0); +#endif +} + static void init_proc_book3s_64(CPUPPCState *env, int version) { gen_spr_ne_601(env); @@ -7976,6 +7987,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_tm(env); gen_spr_power8_pspb(env); gen_spr_vtb(env); + gen_spr_power8_ic(env); } if (version < BOOK3S_CPU_POWER8) { gen_spr_book3s_dbg(env); |