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author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 12:36:27 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 12:36:27 +0100 |
commit | 4acc8fdfd315f7ee474bea28fcbcc4dca9717d13 (patch) | |
tree | 22439debf42c54ea0a2ae0e50dceb18ad0f9a74d /target-ppc | |
parent | 7263a903c361edd174946a4708374f5aa6c6b834 (diff) | |
parent | 2474bfd4603b2d354fdb4001b083b7c72bff627f (diff) | |
download | qemu-4acc8fdfd315f7ee474bea28fcbcc4dca9717d13.tar.gz |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160617' into staging
ppc patch queue for 2016-06-17
Here's the current accumulated set of spapr, ppc and related patches.
* The big thing in here is CPU hotplug for spapr
- This includes a number of acked generic changes adding new
infrastructure for hotplugging cpu cores
* A number of TCG bug fixes are also included
* This adds a new testcase to make it harder to accidentally break
Macintosh (and other openbios) platforms
# gpg: Signature made Fri 17 Jun 2016 07:35:29 BST
# gpg: using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.7-20160617:
spapr: implement query-hotpluggable-cpus callback
hmp: Add 'info hotpluggable-cpus' HMP command
QMP: Add query-hotpluggable-cpus
spapr: CPU hot unplug support
spapr: CPU hotplug support
spapr: convert boot CPUs into CPU core devices
spapr: Move spapr_cpu_init() to spapr_cpu_core.c
spapr: Abstract CPU core device and type specific core devices
qom: API to get instance_size of a type
spapr_drc: Prevent detach racing against attach for CPU DR
xics,xics_kvm: Handle CPU unplug correctly
cpu: Abstract CPU core type
qdev: hotplug: Introduce HotplugHandler.pre_plug() callback
target-ppc: Fix rlwimi, rlwinm, rlwnm
vfio: Fix broken EEH
target-ppc: Bug in BookE wait instruction
ppc / sparc: Add a tester for checking whether OpenBIOS runs successfully
hw/ppc/spapr: Silence deprecation message in qtest mode
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/kvm.c | 28 | ||||
-rw-r--r-- | target-ppc/translate.c | 75 |
2 files changed, 81 insertions, 22 deletions
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c index 16208649c5..e14da60b77 100644 --- a/target-ppc/kvm.c +++ b/target-ppc/kvm.c @@ -42,6 +42,9 @@ #include "exec/memattrs.h" #include "sysemu/hostmem.h" #include "qemu/cutils.h" +#if defined(TARGET_PPC64) +#include "hw/ppc/spapr_cpu_core.h" +#endif //#define DEBUG_KVM @@ -2341,6 +2344,19 @@ PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) return pvr_pcc; } +#if defined(TARGET_PPC64) +static void spapr_cpu_core_host_initfn(Object *obj) +{ + sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); + char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, "host"); + ObjectClass *oc = object_class_by_name(name); + + g_assert(oc); + g_free((void *)name); + core->cpu_class = oc; +} +#endif + static int kvm_ppc_register_host_cpu_type(void) { TypeInfo type_info = { @@ -2358,6 +2374,18 @@ static int kvm_ppc_register_host_cpu_type(void) type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc)); type_register(&type_info); +#if defined(TARGET_PPC64) + type_info.name = g_strdup_printf("%s-"TYPE_SPAPR_CPU_CORE, "host"); + type_info.parent = TYPE_SPAPR_CPU_CORE, + type_info.instance_size = sizeof(sPAPRCPUCore), + type_info.instance_init = spapr_cpu_core_host_initfn, + type_info.class_init = NULL; + type_register(&type_info); + g_free((void *)type_info.name); + type_info.instance_size = 0; + type_info.instance_init = NULL; +#endif + /* Register generic family CPU class for a family */ pvr_pcc = ppc_cpu_get_family_class(pvr_pcc); dc = DEVICE_CLASS(pvr_pcc); diff --git a/target-ppc/translate.c b/target-ppc/translate.c index b6894751e8..30dc76aafa 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1636,7 +1636,6 @@ static void gen_rlwimi(DisasContext *ctx) tcg_gen_deposit_tl(t_ra, t_ra, t_rs, sh, me - mb + 1); } else { target_ulong mask; - TCGv_i32 t0; TCGv t1; #if defined(TARGET_PPC64) @@ -1645,12 +1644,21 @@ static void gen_rlwimi(DisasContext *ctx) #endif mask = MASK(mb, me); - t0 = tcg_temp_new_i32(); t1 = tcg_temp_new(); - tcg_gen_trunc_tl_i32(t0, t_rs); - tcg_gen_rotli_i32(t0, t0, sh); - tcg_gen_extu_i32_tl(t1, t0); - tcg_temp_free_i32(t0); + if (mask <= 0xffffffffu) { + TCGv_i32 t0 = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t0, t_rs); + tcg_gen_rotli_i32(t0, t0, sh); + tcg_gen_extu_i32_tl(t1, t0); + tcg_temp_free_i32(t0); + } else { +#if defined(TARGET_PPC64) + tcg_gen_deposit_i64(t1, t_rs, t_rs, 32, 32); + tcg_gen_rotli_i64(t1, t1, sh); +#else + g_assert_not_reached(); +#endif + } tcg_gen_andi_tl(t1, t1, mask); tcg_gen_andi_tl(t_ra, t_ra, ~mask); @@ -1678,20 +1686,30 @@ static void gen_rlwinm(DisasContext *ctx) tcg_gen_ext32u_tl(t_ra, t_rs); tcg_gen_shri_tl(t_ra, t_ra, mb); } else { + target_ulong mask; #if defined(TARGET_PPC64) mb += 32; me += 32; #endif + mask = MASK(mb, me); + if (sh == 0) { - tcg_gen_andi_tl(t_ra, t_rs, MASK(mb, me)); - } else { + tcg_gen_andi_tl(t_ra, t_rs, mask); + } else if (mask <= 0xffffffffu) { TCGv_i32 t0 = tcg_temp_new_i32(); - tcg_gen_trunc_tl_i32(t0, t_rs); tcg_gen_rotli_i32(t0, t0, sh); - tcg_gen_andi_i32(t0, t0, MASK(mb, me)); + tcg_gen_andi_i32(t0, t0, mask); tcg_gen_extu_i32_tl(t_ra, t0); tcg_temp_free_i32(t0); + } else { +#if defined(TARGET_PPC64) + tcg_gen_deposit_i64(t_ra, t_rs, t_rs, 32, 32); + tcg_gen_rotli_i64(t_ra, t_ra, sh); + tcg_gen_andi_i64(t_ra, t_ra, mask); +#else + g_assert_not_reached(); +#endif } } if (unlikely(Rc(ctx->opcode) != 0)) { @@ -1707,24 +1725,37 @@ static void gen_rlwnm(DisasContext *ctx) TCGv t_rb = cpu_gpr[rB(ctx->opcode)]; uint32_t mb = MB(ctx->opcode); uint32_t me = ME(ctx->opcode); - TCGv_i32 t0, t1; + target_ulong mask; #if defined(TARGET_PPC64) mb += 32; me += 32; #endif + mask = MASK(mb, me); - t0 = tcg_temp_new_i32(); - t1 = tcg_temp_new_i32(); - tcg_gen_trunc_tl_i32(t0, t_rb); - tcg_gen_trunc_tl_i32(t1, t_rs); - tcg_gen_andi_i32(t0, t0, 0x1f); - tcg_gen_rotl_i32(t1, t1, t0); - tcg_temp_free_i32(t0); + if (mask <= 0xffffffffu) { + TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t1 = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t0, t_rb); + tcg_gen_trunc_tl_i32(t1, t_rs); + tcg_gen_andi_i32(t0, t0, 0x1f); + tcg_gen_rotl_i32(t1, t1, t0); + tcg_gen_extu_i32_tl(t_ra, t1); + tcg_temp_free_i32(t0); + tcg_temp_free_i32(t1); + } else { +#if defined(TARGET_PPC64) + TCGv_i64 t0 = tcg_temp_new_i64(); + tcg_gen_andi_i64(t0, t_rb, 0x1f); + tcg_gen_deposit_i64(t_ra, t_rs, t_rs, 32, 32); + tcg_gen_rotl_i64(t_ra, t_ra, t0); + tcg_temp_free_i64(t0); +#else + g_assert_not_reached(); +#endif + } - tcg_gen_andi_i32(t1, t1, MASK(mb, me)); - tcg_gen_extu_i32_tl(t_ra, t1); - tcg_temp_free_i32(t1); + tcg_gen_andi_tl(t_ra, t_ra, mask); if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, t_ra); @@ -3499,7 +3530,7 @@ static void gen_sync(DisasContext *ctx) /* wait */ static void gen_wait(DisasContext *ctx) { - TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t0 = tcg_const_i32(1); tcg_gen_st_i32(t0, cpu_env, -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); tcg_temp_free_i32(t0); |