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authorAurelien Jarno <aurelien@aurel32.net>2015-06-13 00:46:03 +0200
committerAlexander Graf <agraf@suse.de>2015-06-17 12:40:52 +0200
commit3da0ab35292fe93640cfdd95aa8bedec8f145d2c (patch)
treeb1002d1195a3401c89ffa0ce1b7242baa8d83904 /target-s390x/helper.c
parent83bb161299c019e25a3add59504f0b69e6257dcd (diff)
downloadqemu-3da0ab35292fe93640cfdd95aa8bedec8f145d2c.tar.gz
target-s390x: PER: add Breaking-Event-Address register
This patch adds support for PER Breaking-Event-Address register. Like real hardware, it save the current PSW address when the PSW address is changed by an instruction. We have to take care of optimizations QEMU does, a branch to the next instruction is still a branch. This register is copied to low core memory when a program exception happens. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-s390x/helper.c')
-rw-r--r--target-s390x/helper.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 615cccf53f..d88700695e 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -293,6 +293,7 @@ static void do_program_interrupt(CPUS390XState *env)
lowcore->program_old_psw.addr = cpu_to_be64(env->psw.addr);
mask = be64_to_cpu(lowcore->program_new_psw.mask);
addr = be64_to_cpu(lowcore->program_new_psw.addr);
+ lowcore->per_breaking_event_addr = cpu_to_be64(env->gbea);
cpu_unmap_lowcore(lowcore);