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| author | Andreas Färber <afaerber@suse.de> | 2012-11-20 16:15:47 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:54 +0100 |
| commit | b350ab758342c764a6ead6ef064b15a72c830808 (patch) | |
| tree | 8c741a55211c7ef96f732410f9ea4da4555a7567 /target-sh4/cpu-qom.h | |
| parent | c1b382e77d8693955d8838c19b33aeb214724f9b (diff) | |
| download | qemu-b350ab758342c764a6ead6ef064b15a72c830808.tar.gz | |
target-sh4: Move PVR/PRR/CVR into SuperHCPUClass
They are never changed once initialized, and moving them to the class
will allow to inspect them before instantiating.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-sh4/cpu-qom.h')
| -rw-r--r-- | target-sh4/cpu-qom.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h index 19d8b084ff..29628c8077 100644 --- a/target-sh4/cpu-qom.h +++ b/target-sh4/cpu-qom.h @@ -40,6 +40,9 @@ * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. * @name: The name. + * @pvr: Processor Version Register + * @prr: Processor Revision Register + * @cvr: Cache Version Register * * A SuperH CPU model. */ @@ -52,6 +55,9 @@ typedef struct SuperHCPUClass { void (*parent_reset)(CPUState *cpu); const char *name; + uint32_t pvr; + uint32_t prr; + uint32_t cvr; } SuperHCPUClass; /** |