diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-07 22:46:31 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-07 22:46:31 +0000 |
| commit | d8299bccf265b72db967a064e8151660b78cdfae (patch) | |
| tree | d4333d881e01ccea7680165495345d8b05aa14e9 /target-sh4/cpu.h | |
| parent | 54604f74ae618aca3715cf0d8cb2ede923c0d6c0 (diff) | |
| download | qemu-d8299bccf265b72db967a064e8151660b78cdfae.tar.gz | |
SH4: Implement FD bit
SH4 manual say that if a floating point instruction is executed while
FD bit in the status register is 1, an exception should be raised. QEMU
presently does not do that, so the kernel does not initialize FP state
for any thread, nor does it save/restore FP state. The most apparent
consequence is that while recent gcc/libc expect double-precision mode
to be set by kernel, they run in single-precision mode, and all FP code
produces wrong values.
This patch fixes this. It also fixes a couple of places where PC was
not updated before handling an exception, although both those places
deal with invalid instruction and don't lead to any user-visible bugs.
(Vladimir Prus)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5937 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/cpu.h')
| -rw-r--r-- | target-sh4/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 23ecded55f..02ee24198b 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -279,7 +279,8 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, *flags = (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL | DELAY_SLOT_TRUE | DELAY_SLOT_CLEARME)) /* Bits 0- 3 */ | (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR)) /* Bits 19-21 */ - | (env->sr & (SR_MD | SR_RB)); /* Bits 29-30 */ + | (env->sr & (SR_MD | SR_RB)) /* Bits 29-30 */ + | (env->sr & SR_FD); /* Bit 15 */ } #endif /* _CPU_SH4_H */ |