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| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-22 08:57:43 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-22 08:57:43 +0000 |
| commit | 29e179bc3f5e804ab58b975e65c91cb9cd287846 (patch) | |
| tree | 8d423830def55b045ecc213cabb25cda6a78a6a3 /target-sh4/cpu.h | |
| parent | 274a9e70de095240c8013c9dd9980213d54198d0 (diff) | |
| download | qemu-29e179bc3f5e804ab58b975e65c91cb9cd287846.tar.gz | |
[sh4] memory mapped TLB entries
SH4 MMU's memory mapped TLB feature is implemented.
SH-Linux seems to write to memory mapped TLB to invalidate a TLB entry,
but does not to read it. So only memory write feature is implemented.
Work on memory read feature is left.
(Shin-ichiro KAWASAKI)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5067 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/cpu.h')
| -rw-r--r-- | target-sh4/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 601cb247cc..021aced344 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -124,6 +124,8 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model); int cpu_sh4_exec(CPUSH4State * s); int cpu_sh4_signal_handler(int host_signum, void *pinfo, void *puc); +void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr, + uint32_t mem_value); #include "softfloat.h" |