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| author | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-14 20:39:18 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-14 20:39:18 +0100 |
| commit | 17075f10ff9e2c8bd59ecbf9569421e437707e43 (patch) | |
| tree | 0efd45cba8832ac6ff5a484189183dd4a305a714 /target-sh4/translate.c | |
| parent | af8c2bde4b4d4111e5bf49417b74069ce8750435 (diff) | |
| download | qemu-17075f10ff9e2c8bd59ecbf9569421e437707e43.tar.gz | |
target-sh4: add ftrv instruction
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-column
matrix XMTRX by the 4-dimensional vector FVn.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-sh4/translate.c')
| -rw-r--r-- | target-sh4/translate.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 557550f8e1..65b6ea413c 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1871,6 +1871,17 @@ static void _decode_opc(DisasContext * ctx) return; } break; + case 0xf0fd: /* ftrv XMTRX,FVn */ + CHECK_FPU_ENABLED + if ((ctx->opcode & 0x0300) == 0x0100 && + (ctx->fpscr & FPSCR_PR) == 0) { + TCGv n; + n = tcg_const_i32((ctx->opcode >> 18) & 3); + gen_helper_ftrv(n); + tcg_temp_free(n); + return; + } + break; } #if 0 fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n", |