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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-22 11:47:05 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-22 11:47:05 +0000
commit022a22c7e1c8bc5521c521ab9cbecfa893b610c4 (patch)
treedb58c8f90909e8f9c6377ac1d567e8a5f5c35d4d /target-sh4
parente67888a7da3d2fcea87dadf723ba18f8e577734a (diff)
downloadqemu-022a22c7e1c8bc5521c521ab9cbecfa893b610c4.tar.gz
Ignore PR flag in FPSCR when performing fmov, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3005 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4')
-rw-r--r--target-sh4/translate.c45
1 files changed, 7 insertions, 38 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index b90d9b573a..b7be352d00 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -648,10 +648,7 @@ void decode_opc(DisasContext * ctx)
gen_op_xor_T0_rN(REG(B11_8));
return;
case 0xf00c: /* fmov {F,D,X}Rm,{F,D,X}Rn - FPSCR: Nothing */
- if (ctx->fpscr & FPSCR_PR) {
- gen_op_fmov_drN_DT0(XREG(B7_4));
- gen_op_fmov_DT0_drN(XREG(B11_8));
- } else if (ctx->fpscr & FPSCR_SZ) {
+ if (ctx->fpscr & FPSCR_SZ) {
if (ctx->opcode & 0x0110)
break; /* illegal instruction */
gen_op_fmov_drN_DT0(DREG(B7_4));
@@ -662,11 +659,7 @@ void decode_opc(DisasContext * ctx)
}
return;
case 0xf00a: /* fmov {F,D,X}Rm,@Rn - FPSCR: Nothing */
- if (ctx->fpscr & FPSCR_PR) {
- gen_op_fmov_drN_DT0(XREG(B7_4));
- gen_op_movl_rN_T1(REG(B11_8));
- gen_op_stfq_DT0_T1(ctx);
- } else if (ctx->fpscr & FPSCR_SZ) {
+ if (ctx->fpscr & FPSCR_SZ) {
if (ctx->opcode & 0x0010)
break; /* illegal instruction */
gen_op_fmov_drN_DT0(DREG(B7_4));
@@ -679,11 +672,7 @@ void decode_opc(DisasContext * ctx)
}
return;
case 0xf008: /* fmov @Rm,{F,D,X}Rn - FPSCR: Nothing */
- if (ctx->fpscr & FPSCR_PR) {
- gen_op_movl_rN_T0(REG(B7_4));
- gen_op_ldfq_T0_DT0(ctx);
- gen_op_fmov_DT0_drN(XREG(B11_8));
- } else if (ctx->fpscr & FPSCR_SZ) {
+ if (ctx->fpscr & FPSCR_SZ) {
if (ctx->opcode & 0x0100)
break; /* illegal instruction */
gen_op_movl_rN_T0(REG(B7_4));
@@ -696,12 +685,7 @@ void decode_opc(DisasContext * ctx)
}
return;
case 0xf009: /* fmov @Rm+,{F,D,X}Rn - FPSCR: Nothing */
- if (ctx->fpscr & FPSCR_PR) {
- gen_op_movl_rN_T0(REG(B7_4));
- gen_op_ldfq_T0_DT0(ctx);
- gen_op_fmov_DT0_drN(XREG(B11_8));
- gen_op_inc8_rN(REG(B7_4));
- } else if (ctx->fpscr & FPSCR_SZ) {
+ if (ctx->fpscr & FPSCR_SZ) {
if (ctx->opcode & 0x0100)
break; /* illegal instruction */
gen_op_movl_rN_T0(REG(B7_4));
@@ -716,12 +700,7 @@ void decode_opc(DisasContext * ctx)
}
return;
case 0xf00b: /* fmov {F,D,X}Rm,@-Rn - FPSCR: Nothing */
- if (ctx->fpscr & FPSCR_PR) {
- gen_op_dec8_rN(REG(B11_8));
- gen_op_fmov_drN_DT0(XREG(B7_4));
- gen_op_movl_rN_T1(REG(B11_8));
- gen_op_stfq_DT0_T1(ctx);
- } else if (ctx->fpscr & FPSCR_SZ) {
+ if (ctx->fpscr & FPSCR_SZ) {
if (ctx->opcode & 0x0100)
break; /* illegal instruction */
gen_op_dec8_rN(REG(B11_8));
@@ -736,12 +715,7 @@ void decode_opc(DisasContext * ctx)
}
return;
case 0xf006: /* fmov @(R0,Rm),{F,D,X}Rm - FPSCR: Nothing */
- if (ctx->fpscr & FPSCR_PR) {
- gen_op_movl_rN_T0(REG(B7_4));
- gen_op_add_rN_T0(REG(0));
- gen_op_ldfq_T0_DT0(ctx);
- gen_op_fmov_DT0_drN(XREG(B11_8));
- } else if (ctx->fpscr & FPSCR_SZ) {
+ if (ctx->fpscr & FPSCR_SZ) {
if (ctx->opcode & 0x0100)
break; /* illegal instruction */
gen_op_movl_rN_T0(REG(B7_4));
@@ -756,12 +730,7 @@ void decode_opc(DisasContext * ctx)
}
return;
case 0xf007: /* fmov {F,D,X}Rn,@(R0,Rn) - FPSCR: Nothing */
- if (ctx->fpscr & FPSCR_PR) {
- gen_op_fmov_drN_DT0(XREG(B7_4));
- gen_op_movl_rN_T1(REG(B11_8));
- gen_op_add_rN_T1(REG(0));
- gen_op_stfq_DT0_T1(ctx);
- } else if (ctx->fpscr & FPSCR_SZ) {
+ if (ctx->fpscr & FPSCR_SZ) {
if (ctx->opcode & 0x0010)
break; /* illegal instruction */
gen_op_fmov_drN_DT0(DREG(B7_4));