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| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-22 19:50:28 +0000 |
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| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-22 19:50:28 +0000 |
| commit | 9d92659858e5dfad56148586f5d2351178223979 (patch) | |
| tree | 6cd6ae859380ab94bcc4d37016de0a2da02f3cdc /target-sparc/cpu.h | |
| parent | d3ae49bcf77c7604447ab3e1e90a0df0b539afaa (diff) | |
| download | qemu-9d92659858e5dfad56148586f5d2351178223979.tar.gz | |
Add software and timer interrupt support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/cpu.h')
| -rw-r--r-- | target-sparc/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 87fd3190a3..6faaa6f914 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -329,6 +329,8 @@ typedef struct CPUSPARCState { /* UA 2005 hyperprivileged registers */ uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr; void *hstick; // UA 2005 + uint32_t softint; +#define SOFTINT_TIMER 1 #endif sparc_def_t *def; } CPUSPARCState; |