diff options
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2015-11-08 17:11:59 +0000 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2016-01-07 12:21:06 +0000 |
| commit | c9a464420d7eb67dace1f630554245360b4c7c5b (patch) | |
| tree | d8d1c674889a55840a760c71f63758d1435425cc /target-sparc/helper.c | |
| parent | bf43330aa418908f7a5e2acda28ac1a8ed0d8ad6 (diff) | |
| download | qemu-c9a464420d7eb67dace1f630554245360b4c7c5b.tar.gz | |
target-sparc: implement NPT timer bit
If the NPT bit is set in the timer register, all non-supervisor read accesses
to the register should fail with a privilege exception.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-By: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'target-sparc/helper.c')
| -rw-r--r-- | target-sparc/helper.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 4850c7cec7..6600834d4a 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -51,10 +51,16 @@ void helper_tick_set_count(void *opaque, uint64_t count) #endif } -uint64_t helper_tick_get_count(void *opaque) +uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx) { #if !defined(CONFIG_USER_ONLY) - return cpu_tick_get_count(opaque); + CPUTimer *timer = opaque; + + if (timer->npt && mem_idx < MMU_KERNEL_IDX) { + helper_raise_exception(env, TT_PRIV_INSN); + } + + return cpu_tick_get_count(timer); #else return 0; #endif |