diff options
| author | Fabien Chouteau <chouteau@adacore.com> | 2011-01-24 12:56:56 +0100 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-01-24 20:54:34 +0000 |
| commit | 4a2ba232843ac4197c586c1f0f0adbb1eb02fe34 (patch) | |
| tree | d24803cef3f9de4140d0b7f599a44675e68e468a /target-sparc/helper.c | |
| parent | b04d98905400aeb7dd62ce938d7eecddf2816817 (diff) | |
| download | qemu-4a2ba232843ac4197c586c1f0f0adbb1eb02fe34.tar.gz | |
SPARC: Add asr17 register support
This register is activated by CPU_FEATURE_ASR17 in the feature field.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/helper.c')
| -rw-r--r-- | target-sparc/helper.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c index ec6ac271f1..2f3d1e61f3 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -1288,7 +1288,8 @@ static const sparc_def_t sparc_defs[] = { .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, .nwindows = 8, - .features = CPU_DEFAULT_FEATURES | CPU_FEATURE_TA0_SHUTDOWN, + .features = CPU_DEFAULT_FEATURES | CPU_FEATURE_TA0_SHUTDOWN | + CPU_FEATURE_ASR17, }, #endif }; |