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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2014-08-11 12:22:52 +0100 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2014-08-17 13:13:01 +0100 |
| commit | b87b0644bc04dd88c38cf2eb2f59756d59808204 (patch) | |
| tree | ea107b322147b584e3058685f583d861f3183eec /target-sparc/ldst_helper.c | |
| parent | a1cf8be550c65d316ad666c778e21773ce113eb8 (diff) | |
| download | qemu-b87b0644bc04dd88c38cf2eb2f59756d59808204.tar.gz | |
apb: add IOMMU flush register implementation
The IOMMU flush register is a write-only register used to remove entries from the
hardware TLB. Allow guest writes to this register as a no-op, and return a value
of 0 for reads.
This fixes IOMMU DMA operations under NetBSD SPARC64.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'target-sparc/ldst_helper.c')
0 files changed, 0 insertions, 0 deletions