diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-07-12 21:01:29 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2016-10-31 09:46:25 -0600 |
| commit | af7a06bac7d3abb2da48ef3277d2a415772d2ae8 (patch) | |
| tree | 142792b8eeb3d991b567978fe34283a6d9946ce7 /target-sparc/ldst_helper.c | |
| parent | 2f9d35fc4006122bad33f9ae3e2e51d2263e98ee (diff) | |
| download | qemu-af7a06bac7d3abb2da48ef3277d2a415772d2ae8.tar.gz | |
target-sparc: Add MMU_PHYS_IDX
It's handy to have a mmu idx for physical addresses, so
that mmu disabled and physical access asis can use the
same path as normal accesses.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-sparc/ldst_helper.c')
| -rw-r--r-- | target-sparc/ldst_helper.c | 27 |
1 files changed, 6 insertions, 21 deletions
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index 3c70766adf..667b962afe 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -887,10 +887,10 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, case 0: /* Control Register */ env->mmuregs[reg] = (env->mmuregs[reg] & 0xff000000) | (val & 0x00ffffff); - /* Mappings generated during no-fault mode or MMU - disabled mode are invalid in normal mode */ - if ((oldreg & (MMU_E | MMU_NF | env->def->mmu_bm)) != - (env->mmuregs[reg] & (MMU_E | MMU_NF | env->def->mmu_bm))) { + /* Mappings generated during no-fault mode + are invalid in normal mode. */ + if ((oldreg ^ env->mmuregs[reg]) + & (MMU_NF | env->def->mmu_bm)) { tlb_flush(CPU(cpu), 1); } break; @@ -1866,23 +1866,8 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, /* XXX */ return; case ASI_LSU_CONTROL: /* LSU */ - { - uint64_t oldreg; - - oldreg = env->lsu; - env->lsu = val & (DMMU_E | IMMU_E); - /* Mappings generated during D/I MMU disabled mode are - invalid in normal mode */ - if (oldreg != env->lsu) { - DPRINTF_MMU("LSU change: 0x%" PRIx64 " -> 0x%" PRIx64 "\n", - oldreg, env->lsu); -#ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); -#endif - tlb_flush(CPU(cpu), 1); - } - return; - } + env->lsu = val & (DMMU_E | IMMU_E); + return; case ASI_IMMU: /* I-MMU regs */ { int reg = (addr >> 3) & 0xf; |