diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-01 15:13:58 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-01 15:13:58 +0000 |
| commit | a7a044f29e288c64aafc8e82ccfeeb9c6aa49017 (patch) | |
| tree | 01c6bb3527d7b3415d6ed9adc99c0df3acb56dc9 /target-sparc/machine.c | |
| parent | bc0129d97804615fbcf3281fe30361ab8aa8f4ab (diff) | |
| download | qemu-a7a044f29e288c64aafc8e82ccfeeb9c6aa49017.tar.gz | |
Handle wrapped registers correctly when saving
Fix typo
Save and load interrupt_index and pil_in
Original patch by Luis Pureza
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4980 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/machine.c')
| -rw-r--r-- | target-sparc/machine.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/target-sparc/machine.c b/target-sparc/machine.c index f5a00179bb..626a088c21 100644 --- a/target-sparc/machine.c +++ b/target-sparc/machine.c @@ -31,6 +31,10 @@ void cpu_save(QEMUFile *f, void *opaque) int i; uint32_t tmp; + // if env->cwp == env->nwindows - 1, this will set the ins of the last + // window as the outs of the first window + cpu_set_cwp(env, env->cwp); + for(i = 0; i < 8; i++) qemu_put_betls(f, &env->gregs[i]); qemu_put_be32s(f, &env->nwindows); @@ -54,6 +58,9 @@ void cpu_save(QEMUFile *f, void *opaque) qemu_put_be32(f, tmp); qemu_put_betls(f, &env->fsr); qemu_put_betls(f, &env->tbr); + tmp = env->interrupt_index; + qemu_put_be32(f, tmp); + qemu_put_be32s(f, &env->pil_in); #ifndef TARGET_SPARC64 qemu_put_be32s(f, &env->wim); /* MMU */ @@ -110,7 +117,7 @@ void cpu_save(QEMUFile *f, void *opaque) qemu_put_be64s(f, &env->hver); qemu_put_be64s(f, &env->hstick_cmpr); qemu_put_be64s(f, &env->ssr); - qemu_get_ptimer(f, env->hstick); + qemu_put_ptimer(f, env->hstick); #endif } @@ -147,6 +154,9 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) PUT_PSR(env, tmp); qemu_get_betls(f, &env->fsr); qemu_get_betls(f, &env->tbr); + tmp = qemu_get_be32(f); + env->interrupt_index = tmp; + qemu_get_be32s(f, &env->pil_in); #ifndef TARGET_SPARC64 qemu_get_be32s(f, &env->wim); /* MMU */ |