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authorArtyom Tarasenko <atar4qemu@googlemail.com>2010-05-29 22:48:25 +0200
committerBlue Swirl <blauwirbel@gmail.com>2010-05-29 21:22:02 +0000
commitda7ed37955d955b47a538fcfe65ad1cc730e69a5 (patch)
tree0f73987f38a728dadcf32136ab1daa7754dfe23c /target-sparc/op_helper.c
parent471fd34221dcda9b271a3016f95e1ad12842c5ff (diff)
downloadqemu-da7ed37955d955b47a538fcfe65ad1cc730e69a5.tar.gz
sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)
SuperSPARC MMU Breakpoint Action register is used by OBP at boot The patch allows booting Solaris and some other OS with SPARCStation-20 OBP. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/op_helper.c')
-rw-r--r--target-sparc/op_helper.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index aaacfc484e..ef3504fad1 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -1745,6 +1745,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
case 0x31: // Turbosparc RAM snoop
case 0x32: // Turbosparc page table descriptor diagnostic
case 0x39: /* data cache diagnostic register */
+ case 0x4c: /* SuperSPARC MMU Breakpoint Action register */
ret = 0;
break;
case 0x38: /* SuperSPARC MMU Breakpoint Control Registers */