diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-29 18:11:20 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-29 18:11:20 +0000 |
| commit | dd5e6304aa93ed9e0ca197a724a90e27379a37ea (patch) | |
| tree | c6b89e548490299052fb57e7d0f89c43279a5a60 /target-sparc | |
| parent | ab17b46d00f21a3c2fcbe4d0f8894372e79528fa (diff) | |
| download | qemu-dd5e6304aa93ed9e0ca197a724a90e27379a37ea.tar.gz | |
Fix cmp/subcc/addcc op bugs reported by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/translate.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 3900d262d2..0646b74137 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -386,7 +386,7 @@ static inline void gen_cc_V_add_icc(TCGv dst, TCGv src1, TCGv src2) tcg_gen_xori_tl(r_temp, r_temp, -1); tcg_gen_xor_tl(cpu_tmp0, src1, dst); tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); - tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31)); tcg_gen_shri_tl(r_temp, r_temp, 31 - PSR_OVF_SHIFT); tcg_gen_trunc_tl_i32(cpu_tmp32, r_temp); tcg_temp_free(r_temp); @@ -423,7 +423,7 @@ static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2) tcg_gen_xori_tl(r_temp, r_temp, -1); tcg_gen_xor_tl(cpu_tmp0, src1, dst); tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); - tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31)); tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1); r_const = tcg_const_i32(TT_TOVF); tcg_gen_helper_0_1(raise_exception, r_const); @@ -584,7 +584,7 @@ static inline void gen_cc_V_sub_icc(TCGv dst, TCGv src1, TCGv src2) tcg_gen_xor_tl(r_temp, src1, src2); tcg_gen_xor_tl(cpu_tmp0, src1, dst); tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); - tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31)); tcg_gen_shri_tl(r_temp, r_temp, 31 - PSR_OVF_SHIFT); tcg_gen_trunc_tl_i32(cpu_tmp32, r_temp); tcg_gen_or_i32(cpu_psr, cpu_psr, cpu_tmp32); @@ -619,7 +619,7 @@ static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2) tcg_gen_xor_tl(r_temp, src1, src2); tcg_gen_xor_tl(cpu_tmp0, src1, dst); tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); - tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); + tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31)); tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1); r_const = tcg_const_i32(TT_TOVF); tcg_gen_helper_0_1(raise_exception, r_const); |