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| author | Andreas Färber <afaerber@suse.de> | 2013-06-21 20:20:45 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-23 02:41:32 +0200 |
| commit | ed2803da58355413447f8c7c681a76873168114f (patch) | |
| tree | 3772ea93bce05d67ccbd4194eb77173dc46a5706 /target-sparc | |
| parent | 801c4c287b7d85fe8447900f78a9a6ab89d00271 (diff) | |
| download | qemu-ed2803da58355413447f8c7c681a76873168114f.tar.gz | |
cpu: Move singlestep_enabled field from CPU_COMMON to CPUState
Prepares for changing cpu_single_step() argument to CPUState.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/translate.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 5e771e5da7..093e0e2c78 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5223,6 +5223,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, TranslationBlock *tb, bool spc) { + CPUState *cs = CPU(cpu); CPUSPARCState *env = &cpu->env; target_ulong pc_start, last_pc; uint16_t *gen_opc_end; @@ -5244,7 +5245,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, dc->def = env->def; dc->fpu_enabled = tb_fpu_enabled(tb->flags); dc->address_mask_32bit = tb_am_enabled(tb->flags); - dc->singlestep = (env->singlestep_enabled || singlestep); + dc->singlestep = (cs->singlestep_enabled || singlestep); gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; num_insns = 0; |