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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2004-10-03 15:07:13 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2004-10-03 15:07:13 +0000
commitb769d8fef6c06ddb39ef0337882a4f8872b9c2bc (patch)
treef66f789f12d413c07036e7a0dd5f63e425743d65 /target-sparc
parent32ff25bf68e687a6c15bfef2d855faccb2740472 (diff)
downloadqemu-b769d8fef6c06ddb39ef0337882a4f8872b9c2bc.tar.gz
removed access_type hack
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1095 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/cpu.h5
-rw-r--r--target-sparc/helper.c10
-rw-r--r--target-sparc/translate.c5
3 files changed, 3 insertions, 17 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index ec9bba76a6..4c23b924a4 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -86,10 +86,6 @@
#define PG_MODIFIED_MASK (1 << PG_MODIFIED_BIT)
#define PG_CACHE_MASK (1 << PG_CACHE_BIT)
-#define ACCESS_DATA 0
-#define ACCESS_CODE 1
-#define ACCESS_MMU 2
-
#define NWINDOWS 32
typedef struct CPUSPARCState {
@@ -131,7 +127,6 @@ typedef struct CPUSPARCState {
CPUTLBEntry tlb_read[2][CPU_TLB_SIZE];
CPUTLBEntry tlb_write[2][CPU_TLB_SIZE];
int error_code;
- int access_type;
/* MMU regs */
uint32_t mmuregs[16];
/* temporary float registers */
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 0367200452..ae70595c5f 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -132,13 +132,12 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
int is_user, int is_softmmu)
{
int exception = 0;
- int access_type, access_perms = 0, access_index = 0;
+ int access_perms = 0, access_index = 0;
uint8_t *pde_ptr;
uint32_t pde, virt_addr;
int error_code = 0, is_dirty, prot, ret = 0;
unsigned long paddr, vaddr, page_offset;
- access_type = env->access_type;
if (env->user_mode_only) {
/* user mode only emulation */
ret = -2;
@@ -156,7 +155,6 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
/* SPARC reference MMU table walk: Context table->L1->L2->PTE */
/* Context base + context number */
pde_ptr = phys_ram_base + (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4);
- env->access_type = ACCESS_MMU;
pde = ldl_raw(pde_ptr);
/* Ctx pde */
@@ -219,7 +217,7 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
}
/* update page modified and dirty bits */
- is_dirty = rw && !(pde & PG_MODIFIED_MASK);
+ is_dirty = (rw & 1) && !(pde & PG_MODIFIED_MASK);
if (!(pde & PG_ACCESSED_MASK) || is_dirty) {
pde |= PG_ACCESSED_MASK;
if (is_dirty)
@@ -228,7 +226,7 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
}
/* check access */
- access_index = (rw << 2) | ((access_type == ACCESS_CODE)? 2 : 0) | (is_user? 0 : 1);
+ access_index = ((rw & 1) << 2) | (rw & 2) | (is_user? 0 : 1);
access_perms = (pde & PTE_ACCESS_MASK) >> PTE_ACCESS_SHIFT;
error_code = access_table[access_index][access_perms];
if (error_code)
@@ -249,14 +247,12 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
paddr = ((pde & PTE_ADDR_MASK) << 4) + page_offset;
do_mapping:
- env->access_type = access_type;
vaddr = virt_addr + ((address & TARGET_PAGE_MASK) & (TARGET_PAGE_SIZE - 1));
ret = tlb_set_page(env, vaddr, paddr, prot, is_user, is_softmmu);
return ret;
do_fault:
- env->access_type = access_type;
if (env->mmuregs[3]) /* Fault status register */
env->mmuregs[3] = 1; /* overflow (not read before another fault) */
env->mmuregs[3] |= (access_index << 5) | (error_code << 2) | 2;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 852507ab19..d06886c843 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1278,8 +1278,6 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
gen_opparam_ptr = gen_opparam_buf;
- env->access_type = ACCESS_CODE;
-
do {
if (env->nb_breakpoints > 0) {
for(j = 0; j < env->nb_breakpoints; j++) {
@@ -1352,8 +1350,6 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
}
}
#endif
-
- env->access_type = ACCESS_DATA;
return 0;
}
@@ -1379,7 +1375,6 @@ CPUSPARCState *cpu_sparc_init(void)
env->cwp = 0;
env->wim = 1;
env->regwptr = env->regbase + (env->cwp * 16);
- env->access_type = ACCESS_DATA;
#if defined(CONFIG_USER_ONLY)
env->user_mode_only = 1;
#else