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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-08-17 17:34:10 +1000 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-09-11 08:15:28 -0700 |
| commit | 97ed5ccdee95f0b98bedc601ff979e368583472c (patch) | |
| tree | 5ee711528010f3700f13983b8222c2ca7ae85c83 /target-sparc | |
| parent | ba9cef7b6e487a5a8969db81d09b8eec8a2b50c6 (diff) | |
| download | qemu-97ed5ccdee95f0b98bedc601ff979e368583472c.tar.gz | |
tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.
The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.
All targets ignore it for now, and all other callers pass "false".
This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/cpu.h | 2 | ||||
| -rw-r--r-- | target-sparc/mmu_helper.c | 2 | ||||
| -rw-r--r-- | target-sparc/translate.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 0522b65f19..72ea1710ae 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -642,7 +642,7 @@ static inline int cpu_supervisor_mode(CPUSPARCState *env1) } #endif -static inline int cpu_mmu_index(CPUSPARCState *env1) +static inline int cpu_mmu_index(CPUSPARCState *env1, bool ifetch) { #if defined(CONFIG_USER_ONLY) return MMU_USER_IDX; diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c index 2a0c6f0d3d..7495406b3e 100644 --- a/target-sparc/mmu_helper.c +++ b/target-sparc/mmu_helper.c @@ -849,7 +849,7 @@ hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; hwaddr phys_addr; - int mmu_idx = cpu_mmu_index(env); + int mmu_idx = cpu_mmu_index(env, false); MemoryRegionSection section; if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 2, mmu_idx) != 0) { diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 48fc2abe63..4690b4699a 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5234,7 +5234,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, last_pc = dc->pc; dc->npc = (target_ulong) tb->cs_base; dc->cc_op = CC_OP_DYNAMIC; - dc->mem_idx = cpu_mmu_index(env); + dc->mem_idx = cpu_mmu_index(env, false); dc->def = env->def; dc->fpu_enabled = tb_fpu_enabled(tb->flags); dc->address_mask_32bit = tb_am_enabled(tb->flags); |