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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-01-11 12:40:24 +0000 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2016-01-16 12:01:23 +0000 |
| commit | 4552a09dd4055c806b7df8c595dc0fb8951834be (patch) | |
| tree | ae7e3bb8cc9064843c9aaf2c01c2500147d3a3cf /target-sparc | |
| parent | 365162f7c09a428f16d2278e025328e73539ae8b (diff) | |
| download | qemu-4552a09dd4055c806b7df8c595dc0fb8951834be.tar.gz | |
target-sparc: Split cpu_put_psr into side-effect and no-side-effect parts
For inbound migration we really want to be able to set the PSR without
having any side effects, but cpu_put_psr() calls cpu_check_irqs() which
might try to deliver CPU interrupts. Split cpu_put_psr() into the
no-side-effect and side-effect parts.
This includes reordering the cpu_check_irqs() to the end of cpu_put_psr(),
because that function may actually end up calling cpu_interrupt(), which
does not seem like a good thing to happen in the middle of updating the PSR.
Suggested-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/cpu.h | 1 | ||||
| -rw-r--r-- | target-sparc/win_helper.c | 19 |
2 files changed, 13 insertions, 7 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 4aa689ed0b..d9635079e1 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -539,6 +539,7 @@ int cpu_sparc_exec(CPUState *cpu); /* win_helper.c */ target_ulong cpu_get_psr(CPUSPARCState *env1); void cpu_put_psr(CPUSPARCState *env1, target_ulong val); +void cpu_put_psr_raw(CPUSPARCState *env1, target_ulong val); #ifdef TARGET_SPARC64 target_ulong cpu_get_ccr(CPUSPARCState *env1); void cpu_put_ccr(CPUSPARCState *env1, target_ulong val); diff --git a/target-sparc/win_helper.c b/target-sparc/win_helper.c index f01ae08f6c..5b6d7b5ae3 100644 --- a/target-sparc/win_helper.c +++ b/target-sparc/win_helper.c @@ -64,23 +64,28 @@ target_ulong cpu_get_psr(CPUSPARCState *env) #endif } -void cpu_put_psr(CPUSPARCState *env, target_ulong val) +void cpu_put_psr_raw(CPUSPARCState *env, target_ulong val) { env->psr = val & PSR_ICC; #if !defined(TARGET_SPARC64) env->psref = (val & PSR_EF) ? 1 : 0; env->psrpil = (val & PSR_PIL) >> 8; -#endif -#if ((!defined(TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) - cpu_check_irqs(env); -#endif -#if !defined(TARGET_SPARC64) env->psrs = (val & PSR_S) ? 1 : 0; env->psrps = (val & PSR_PS) ? 1 : 0; env->psret = (val & PSR_ET) ? 1 : 0; - cpu_set_cwp(env, val & PSR_CWP); #endif env->cc_op = CC_OP_FLAGS; +#if !defined(TARGET_SPARC64) + cpu_set_cwp(env, val & PSR_CWP); +#endif +} + +void cpu_put_psr(CPUSPARCState *env, target_ulong val) +{ + cpu_put_psr_raw(env, val); +#if ((!defined(TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) + cpu_check_irqs(env); +#endif } int cpu_cwp_inc(CPUSPARCState *env, int cwp) |