summaryrefslogtreecommitdiff
path: root/target-tilegx/cpu.c
diff options
context:
space:
mode:
authorRichard Henderson <rth@twiddle.net>2015-08-21 11:49:38 -0700
committerRichard Henderson <rth@twiddle.net>2015-09-15 07:45:28 -0700
commit9b9dc7aceca411f1fb69d5426e5e88dd204813ed (patch)
tree12f4a1441ffb558a2029e6a15ac3c9f18265eb01 /target-tilegx/cpu.c
parent8fd29dd72b44b08af536248cbfc77f5c6bdf803d (diff)
downloadqemu-9b9dc7aceca411f1fb69d5426e5e88dd204813ed.tar.gz
target-tilegx: Generate SEGV properly
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx/cpu.c')
-rw-r--r--target-tilegx/cpu.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/target-tilegx/cpu.c b/target-tilegx/cpu.c
index 87aee248b4..78b73e45c4 100644
--- a/target-tilegx/cpu.c
+++ b/target-tilegx/cpu.c
@@ -119,7 +119,10 @@ static void tilegx_cpu_do_interrupt(CPUState *cs)
static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
int mmu_idx)
{
- cpu_dump_state(cs, stderr, fprintf, 0);
+ TileGXCPU *cpu = TILEGX_CPU(cs);
+
+ cs->exception_index = TILEGX_EXCP_SEGV;
+ cpu->env.excaddr = address;
return 1;
}