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| author | Chen Gang <gang.chen.5i5j@gmail.com> | 2015-10-04 19:01:26 +0800 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:03:16 +1100 |
| commit | aaf893a6ad6c7c0a986638ba599000e13f9f4182 (patch) | |
| tree | 309c89c5dac7cf7be33d910d5f519c84fb3780d3 /target-tilegx/translate.c | |
| parent | 78affcb798516dcb5d44a7ed598d79dcd42cd988 (diff) | |
| download | qemu-aaf893a6ad6c7c0a986638ba599000e13f9f4182.tar.gz | |
target-tilegx: Implement v?int_* instructions.
Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Message-Id: <1443956491-26850-2-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx/translate.c')
| -rw-r--r-- | target-tilegx/translate.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 9bb8857876..034cbc22c9 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -1260,10 +1260,17 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(V1DOTPUS, 0, X0): case OE_RRR(V1DOTPU, 0, X0): case OE_RRR(V1DOTP, 0, X0): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1INT_H, 0, X0): case OE_RRR(V1INT_H, 0, X1): + gen_helper_v1int_h(tdest, tsrca, tsrcb); + mnemonic = "v1int_h"; + break; case OE_RRR(V1INT_L, 0, X0): case OE_RRR(V1INT_L, 0, X1): + gen_helper_v1int_l(tdest, tsrca, tsrcb); + mnemonic = "v1int_l"; + break; case OE_RRR(V1MAXU, 0, X0): case OE_RRR(V1MAXU, 0, X1): case OE_RRR(V1MINU, 0, X0): @@ -1329,10 +1336,17 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(V2CMPNE, 0, X1): case OE_RRR(V2DOTPA, 0, X0): case OE_RRR(V2DOTP, 0, X0): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V2INT_H, 0, X0): case OE_RRR(V2INT_H, 0, X1): + gen_helper_v2int_h(tdest, tsrca, tsrcb); + mnemonic = "v2int_h"; + break; case OE_RRR(V2INT_L, 0, X0): case OE_RRR(V2INT_L, 0, X1): + gen_helper_v2int_l(tdest, tsrca, tsrcb); + mnemonic = "v2int_l"; + break; case OE_RRR(V2MAXS, 0, X0): case OE_RRR(V2MAXS, 0, X1): case OE_RRR(V2MINS, 0, X0): |