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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2015-05-07 19:55:37 +0200
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2015-05-22 17:02:33 +0200
commite5c96c82bc529674b61eacd221734abc2674e264 (patch)
tree1f868a6fbb25d9bf931752028c2afdac97cb4d8c /target-tricore/op_helper.c
parentddd8cebe3106bdfb2681d8d283296199fd6c7417 (diff)
downloadqemu-e5c96c82bc529674b61eacd221734abc2674e264.tar.gz
target-tricore: add RR_CRC32 instruction of the v1.6.1 ISA
This instruction was introduced by the new Aurix platform. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tricore/op_helper.c')
-rw-r--r--target-tricore/op_helper.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
index 9919b5b17b..7aa1f8e40e 100644
--- a/target-tricore/op_helper.c
+++ b/target-tricore/op_helper.c
@@ -19,6 +19,7 @@
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
+#include <zlib.h> /* for crc32 */
/* Addressing mode helper */
@@ -2165,6 +2166,16 @@ uint32_t helper_mulr_h(uint32_t arg00, uint32_t arg01,
return (result1 & 0xffff0000) | (result0 >> 16);
}
+uint32_t helper_crc32(uint32_t arg0, uint32_t arg1)
+{
+ uint8_t buf[4];
+ uint32_t ret;
+ stl_be_p(buf, arg0);
+
+ ret = crc32(arg1, buf, 4);
+ return ret;
+}
+
/* context save area (CSA) related helpers */
static int cdc_increment(target_ulong *psw)