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| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2016-03-11 16:03:14 +0100 |
|---|---|---|
| committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2016-03-23 09:22:48 +0100 |
| commit | daab3f7fa8c9b29ed6dff9160a6a87e0ea09d705 (patch) | |
| tree | 56a82e62faca710e0919bfd17cd7f522a9a789b1 /target-tricore | |
| parent | baf410dccac82f446d83bb10509608f59adbd8ee (diff) | |
| download | qemu-daab3f7fa8c9b29ed6dff9160a6a87e0ea09d705.tar.gz | |
target-tricore: Add mul.f instruction
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1457708597-3025-5-git-send-email-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target-tricore')
| -rw-r--r-- | target-tricore/fpu_helper.c | 26 | ||||
| -rw-r--r-- | target-tricore/helper.h | 1 | ||||
| -rw-r--r-- | target-tricore/translate.c | 3 |
3 files changed, 30 insertions, 0 deletions
diff --git a/target-tricore/fpu_helper.c b/target-tricore/fpu_helper.c index 747d897525..21459bca1a 100644 --- a/target-tricore/fpu_helper.c +++ b/target-tricore/fpu_helper.c @@ -106,3 +106,29 @@ uint32_t helper_f##op(CPUTriCoreState *env, uint32_t r1, uint32_t r2) \ } FADD_SUB(add) FADD_SUB(sub) + +uint32_t helper_fmul(CPUTriCoreState *env, uint32_t r1, uint32_t r2) +{ + uint32_t flags; + float32 arg1 = make_float32(r1); + float32 arg2 = make_float32(r2); + float32 f_result; + + f_result = float32_mul(arg1, arg2, &env->fp_status); + + flags = f_get_excp_flags(env); + if (flags) { + /* If the output is a NaN, but the inputs aren't, + we return a unique value. */ + if ((flags & float_flag_invalid) + && !float32_is_any_nan(arg1) + && !float32_is_any_nan(arg2)) { + f_result = MUL_NAN; + } + f_update_psw_flags(env, flags); + } else { + env->FPU_FS = 0; + } + return (uint32_t)f_result; + +} diff --git a/target-tricore/helper.h b/target-tricore/helper.h index 2f4a2bb639..ac41190810 100644 --- a/target-tricore/helper.h +++ b/target-tricore/helper.h @@ -107,6 +107,7 @@ DEF_HELPER_FLAGS_4(pack, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32, i32) DEF_HELPER_1(unpack, i64, i32) DEF_HELPER_3(fadd, i32, env, i32, i32) DEF_HELPER_3(fsub, i32, env, i32, i32) +DEF_HELPER_3(fmul, i32, env, i32, i32) /* dvinit */ DEF_HELPER_3(dvinit_b_13, i64, env, i32, i32) DEF_HELPER_3(dvinit_b_131, i64, env, i32, i32) diff --git a/target-tricore/translate.c b/target-tricore/translate.c index c4c7717bdb..3dadb17b39 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -6672,6 +6672,9 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx) generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } break; + case OPC2_32_RR_MUL_F: + gen_helper_fmul(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); + break; default: generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } |