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| author | Blue Swirl <blauwirbel@gmail.com> | 2012-09-02 07:42:33 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-09-15 17:44:32 +0000 |
| commit | 04a130eaa10f3d2af6ac9fb68a8daffd40a2f9aa (patch) | |
| tree | 9a3f3932bd951babd6c4508a8b1b5d26be5a50a0 /target-unicore32/helper.h | |
| parent | d4d79bb144f0958f7ee2c6c9ef820dc06c1ff476 (diff) | |
| download | qemu-04a130eaa10f3d2af6ac9fb68a8daffd40a2f9aa.tar.gz | |
target-unicore32: switch to AREG0 free mode
Add an explicit CPUState parameter instead of relying on AREG0
and switch to AREG0 free mode.
Tested-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-unicore32/helper.h')
| -rw-r--r-- | target-unicore32/helper.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/target-unicore32/helper.h b/target-unicore32/helper.h index 305318ae59..a4b81494aa 100644 --- a/target-unicore32/helper.h +++ b/target-unicore32/helper.h @@ -17,26 +17,26 @@ DEF_HELPER_1(cp1_putc, void, i32) DEF_HELPER_1(clz, i32, i32) DEF_HELPER_1(clo, i32, i32) -DEF_HELPER_1(exception, void, i32) +DEF_HELPER_2(exception, void, env, i32) -DEF_HELPER_2(asr_write, void, i32, i32) -DEF_HELPER_0(asr_read, i32) +DEF_HELPER_3(asr_write, void, env, i32, i32) +DEF_HELPER_1(asr_read, i32, env) -DEF_HELPER_1(get_user_reg, i32, i32) -DEF_HELPER_2(set_user_reg, void, i32, i32) +DEF_HELPER_2(get_user_reg, i32, env, i32) +DEF_HELPER_3(set_user_reg, void, env, i32, i32) -DEF_HELPER_2(add_cc, i32, i32, i32) -DEF_HELPER_2(adc_cc, i32, i32, i32) -DEF_HELPER_2(sub_cc, i32, i32, i32) -DEF_HELPER_2(sbc_cc, i32, i32, i32) +DEF_HELPER_3(add_cc, i32, env, i32, i32) +DEF_HELPER_3(adc_cc, i32, env, i32, i32) +DEF_HELPER_3(sub_cc, i32, env, i32, i32) +DEF_HELPER_3(sbc_cc, i32, env, i32, i32) DEF_HELPER_2(shl, i32, i32, i32) DEF_HELPER_2(shr, i32, i32, i32) DEF_HELPER_2(sar, i32, i32, i32) -DEF_HELPER_2(shl_cc, i32, i32, i32) -DEF_HELPER_2(shr_cc, i32, i32, i32) -DEF_HELPER_2(sar_cc, i32, i32, i32) -DEF_HELPER_2(ror_cc, i32, i32, i32) +DEF_HELPER_3(shl_cc, i32, env, i32, i32) +DEF_HELPER_3(shr_cc, i32, env, i32, i32) +DEF_HELPER_3(sar_cc, i32, env, i32, i32) +DEF_HELPER_3(ror_cc, i32, env, i32, i32) DEF_HELPER_1(ucf64_get_fpscr, i32, env) DEF_HELPER_2(ucf64_set_fpscr, void, env, i32) |