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| author | Max Filippov <jcmvbkbc@gmail.com> | 2014-02-15 20:49:09 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2014-02-24 04:47:02 +0400 |
| commit | 604e1f9cd0602e92ba49a27dd3a46db3d29f882e (patch) | |
| tree | a2bc2892e64249c7b84bcedb1480c3491e73fbd8 /target-xtensa/translate.c | |
| parent | 676056d4f1598f3f368da26fdc43371e8ab3a7fb (diff) | |
| download | qemu-604e1f9cd0602e92ba49a27dd3a46db3d29f882e.tar.gz | |
target-xtensa: provide HW confg ID registers
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/translate.c')
| -rw-r--r-- | target-xtensa/translate.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index a59103d2f8..9f5895e021 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -98,12 +98,15 @@ typedef struct XtensaReg { #define XTENSA_REG(regname, opt) XTENSA_REG_ACCESS(regname, opt, SR_RWX) -#define XTENSA_REG_BITS(regname, opt) { \ +#define XTENSA_REG_BITS_ACCESS(regname, opt, acc) { \ .name = (regname), \ .opt_bits = (opt), \ - .access = SR_RWX, \ + .access = (acc), \ } +#define XTENSA_REG_BITS(regname, opt) \ + XTENSA_REG_BITS_ACCESS(regname, opt, SR_RWX) + static const XtensaReg sregnames[256] = { [LBEG] = XTENSA_REG("LBEG", XTENSA_OPTION_LOOP), [LEND] = XTENSA_REG("LEND", XTENSA_OPTION_LOOP), @@ -134,6 +137,7 @@ static const XtensaReg sregnames[256] = { [DBREAKA + 1] = XTENSA_REG("DBREAKA1", XTENSA_OPTION_DEBUG), [DBREAKC] = XTENSA_REG("DBREAKC0", XTENSA_OPTION_DEBUG), [DBREAKC + 1] = XTENSA_REG("DBREAKC1", XTENSA_OPTION_DEBUG), + [CONFIGID0] = XTENSA_REG_BITS_ACCESS("CONFIGID0", XTENSA_OPTION_ALL, SR_R), [EPC1] = XTENSA_REG("EPC1", XTENSA_OPTION_EXCEPTION), [EPC1 + 1] = XTENSA_REG("EPC2", XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT), [EPC1 + 2] = XTENSA_REG("EPC3", XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT), @@ -148,6 +152,7 @@ static const XtensaReg sregnames[256] = { [EPS2 + 3] = XTENSA_REG("EPS5", XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT), [EPS2 + 4] = XTENSA_REG("EPS6", XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT), [EPS2 + 5] = XTENSA_REG("EPS7", XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT), + [CONFIGID1] = XTENSA_REG_BITS_ACCESS("CONFIGID1", XTENSA_OPTION_ALL, SR_R), [EXCSAVE1] = XTENSA_REG("EXCSAVE1", XTENSA_OPTION_EXCEPTION), [EXCSAVE1 + 1] = XTENSA_REG("EXCSAVE2", XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT), |