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authorLluís Vilanova <vilanova@ac.upc.edu>2017-07-14 12:58:33 +0300
committerRichard Henderson <richard.henderson@linaro.org>2017-09-06 08:06:48 -0700
commit2316922420da6fd0d1ffb5557d0cdcc5958bcf44 (patch)
treef3dd8fad21437270414f5d34b441163b14a57112 /target/arm/translate-a64.c
parent58350fa4b2852fede96cfebad0b26bf79bca419c (diff)
downloadqemu-2316922420da6fd0d1ffb5557d0cdcc5958bcf44.tar.gz
target/arm: [tcg] Port to generic translation framework
Tested-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Message-Id: <150002631325.22386.10348327185029496649.stgit@frigg.lan> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/arm/translate-a64.c')
-rw-r--r--target/arm/translate-a64.c107
1 files changed, 18 insertions, 89 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 1973a36462..25c6622825 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11262,6 +11262,11 @@ static int aarch64_tr_init_disas_context(DisasContextBase *dcbase,
return max_insns;
}
+static void aarch64_tr_tb_start(DisasContextBase *db, CPUState *cpu)
+{
+ tcg_clear_temp_count();
+}
+
static void aarch64_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
@@ -11325,6 +11330,7 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
}
dc->base.pc_next = dc->pc;
+ translator_loop_temp_check(&dc->base);
}
static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
@@ -11391,6 +11397,9 @@ static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
break;
}
}
+
+ /* Functions above can change dc->pc, so re-align db->pc_next */
+ dc->base.pc_next = dc->pc;
}
static void aarch64_tr_disas_log(const DisasContextBase *dcbase,
@@ -11403,92 +11412,12 @@ static void aarch64_tr_disas_log(const DisasContextBase *dcbase,
4 | (bswap_code(dc->sctlr_b) ? 2 : 0));
}
-void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
- TranslationBlock *tb)
-{
- DisasContext *dc = container_of(dcbase, DisasContext, base);
- int max_insns;
-
- dc->base.tb = tb;
- dc->base.pc_first = dc->base.tb->pc;
- dc->base.pc_next = dc->base.pc_first;
- dc->base.is_jmp = DISAS_NEXT;
- dc->base.num_insns = 0;
- dc->base.singlestep_enabled = cs->singlestep_enabled;
-
- max_insns = dc->base.tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0) {
- max_insns = CF_COUNT_MASK;
- }
- if (max_insns > TCG_MAX_INSNS) {
- max_insns = TCG_MAX_INSNS;
- }
- max_insns = aarch64_tr_init_disas_context(&dc->base, cs, max_insns);
-
- gen_tb_start(tb);
-
- tcg_clear_temp_count();
-
- do {
- dc->base.num_insns++;
- aarch64_tr_insn_start(&dc->base, cs);
-
- if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
- CPUBreakpoint *bp;
- QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
- if (bp->pc == dc->base.pc_next) {
- if (aarch64_tr_breakpoint_check(&dc->base, cs, bp)) {
- break;
- }
- }
- }
- if (dc->base.is_jmp > DISAS_TOO_MANY) {
- break;
- }
- }
-
- if (dc->base.num_insns == max_insns && (dc->base.tb->cflags & CF_LAST_IO)) {
- gen_io_start();
- }
-
- aarch64_tr_translate_insn(&dc->base, cs);
-
- if (tcg_check_temp_count()) {
- fprintf(stderr, "TCG temporary leak before "TARGET_FMT_lx"\n",
- dc->pc);
- }
-
- if (!dc->base.is_jmp && (tcg_op_buf_full() || cs->singlestep_enabled ||
- singlestep || dc->base.num_insns >= max_insns)) {
- dc->base.is_jmp = DISAS_TOO_MANY;
- }
-
- /* Translation stops when a conditional branch is encountered.
- * Otherwise the subsequent code could get translated several times.
- * Also stop translation when a page boundary is reached. This
- * ensures prefetch aborts occur at the right place.
- */
- } while (!dc->base.is_jmp);
-
- if (dc->base.tb->cflags & CF_LAST_IO) {
- gen_io_end();
- }
-
- aarch64_tr_tb_stop(&dc->base, cs);
-
- gen_tb_end(tb, dc->base.num_insns);
-
- dc->base.tb->size = dc->pc - dc->base.pc_first;
- dc->base.tb->icount = dc->base.num_insns;
-
-#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
- qemu_log_in_addr_range(dc->base.pc_first)) {
- qemu_log_lock();
- qemu_log("----------------\n");
- aarch64_tr_disas_log(&dc->base, cs);
- qemu_log("\n");
- qemu_log_unlock();
- }
-#endif
-}
+const TranslatorOps aarch64_translator_ops = {
+ .init_disas_context = aarch64_tr_init_disas_context,
+ .tb_start = aarch64_tr_tb_start,
+ .insn_start = aarch64_tr_insn_start,
+ .breakpoint_check = aarch64_tr_breakpoint_check,
+ .translate_insn = aarch64_tr_translate_insn,
+ .tb_stop = aarch64_tr_tb_stop,
+ .disas_log = aarch64_tr_disas_log,
+};