diff options
| author | Emilio G. Cota <cota@braap.org> | 2018-02-15 14:51:48 -0500 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-02-16 12:14:39 +1100 |
| commit | b6bac4bc7016531405d117cfc1bf64145799e164 (patch) | |
| tree | 77d22cd63a71f754f555818fe9b9c8a9e1e8b70b /target/ppc/translate | |
| parent | 5d0fb1508e2d279da74ef4a103e8def9b52c6304 (diff) | |
| download | qemu-b6bac4bc7016531405d117cfc1bf64145799e164.tar.gz | |
target/ppc: convert to DisasContextBase
A couple of notes:
- removed ctx->nip in favour of base->pc_next. Yes, it is annoying,
but didn't want to waste its 4 bytes.
- ctx->singlestep_enabled does a lot more than
base.singlestep_enabled; this confused me at first.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate')
| -rw-r--r-- | target/ppc/translate/dfp-impl.inc.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target/ppc/translate/dfp-impl.inc.c b/target/ppc/translate/dfp-impl.inc.c index 178d3044a7..634ef73b8a 100644 --- a/target/ppc/translate/dfp-impl.inc.c +++ b/target/ppc/translate/dfp-impl.inc.c @@ -15,7 +15,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ rd = gen_fprp_ptr(rD(ctx->opcode)); \ ra = gen_fprp_ptr(rA(ctx->opcode)); \ rb = gen_fprp_ptr(rB(ctx->opcode)); \ @@ -36,7 +36,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ ra = gen_fprp_ptr(rA(ctx->opcode)); \ rb = gen_fprp_ptr(rB(ctx->opcode)); \ gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \ @@ -54,7 +54,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ uim = tcg_const_i32(UIMM5(ctx->opcode)); \ rb = gen_fprp_ptr(rB(ctx->opcode)); \ gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \ @@ -72,7 +72,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ ra = gen_fprp_ptr(rA(ctx->opcode)); \ dcm = tcg_const_i32(DCM(ctx->opcode)); \ gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \ @@ -90,7 +90,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ rt = gen_fprp_ptr(rD(ctx->opcode)); \ rb = gen_fprp_ptr(rB(ctx->opcode)); \ u32_1 = tcg_const_i32(u32f1(ctx->opcode)); \ @@ -114,7 +114,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ rt = gen_fprp_ptr(rD(ctx->opcode)); \ ra = gen_fprp_ptr(rA(ctx->opcode)); \ rb = gen_fprp_ptr(rB(ctx->opcode)); \ @@ -137,7 +137,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ rt = gen_fprp_ptr(rD(ctx->opcode)); \ rb = gen_fprp_ptr(rB(ctx->opcode)); \ gen_helper_##name(cpu_env, rt, rb); \ @@ -157,7 +157,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ - gen_update_nip(ctx, ctx->nip - 4); \ + gen_update_nip(ctx, ctx->base.pc_next - 4); \ rt = gen_fprp_ptr(rD(ctx->opcode)); \ rs = gen_fprp_ptr(fprfld(ctx->opcode)); \ i32 = tcg_const_i32(i32fld(ctx->opcode)); \ |