Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging

x86/cpu/numa queue, 2017-10-27

# gpg: Signature made Fri 27 Oct 2017 15:17:12 BST
# gpg:                using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-and-machine-pull-request: (39 commits)
  x86: Skip check apic_id_limit for Xen
  numa: fixup parsed NumaNodeOptions earlier
  mips: r4k: replace cpu_model with cpu_type
  mips: mipssim: replace cpu_model with cpu_type
  mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type
  mips: fulong2e: replace cpu_model with cpu_type
  mips: malta/boston: replace cpu_model with cpu_type
  mips: use object_new() instead of gnew()+object_initialize()
  sparc: leon3: use generic cpu_model parsing
  sparc: sparc: use generic cpu_model parsing
  sparc: sun4u/sun4v/niagara: use generic cpu_model parsing
  sparc: cleanup cpu type name composition
  tricore: use generic cpu_model parsing
  tricore: cleanup cpu type name composition
  unicore32: use generic cpu_model parsing
  unicore32: cleanup cpu type name composition
  xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing
  xtensa: sim: use generic cpu_model parsing
  xtensa: cleanup cpu type name composition
  sh4: remove SuperHCPUClass::name field
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

28 files changed, 287 insertions, 505 deletions

diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index bc9520535b..7d6366bae9 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -108,21 +108,18 @@ void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf)
 }
 
 /* Models */
-
-#define TYPE(model) model "-" TYPE_ALPHA_CPU
-
 typedef struct AlphaCPUAlias {
     const char *alias;
     const char *typename;
 } AlphaCPUAlias;
 
 static const AlphaCPUAlias alpha_cpu_aliases[] = {
-    { "21064",   TYPE("ev4") },
-    { "21164",   TYPE("ev5") },
-    { "21164a",  TYPE("ev56") },
-    { "21164pc", TYPE("pca56") },
-    { "21264",   TYPE("ev6") },
-    { "21264a",  TYPE("ev67") },
+    { "21064",   ALPHA_CPU_TYPE_NAME("ev4") },
+    { "21164",   ALPHA_CPU_TYPE_NAME("ev5") },
+    { "21164a",  ALPHA_CPU_TYPE_NAME("ev56") },
+    { "21164pc", ALPHA_CPU_TYPE_NAME("pca56") },
+    { "21264",   ALPHA_CPU_TYPE_NAME("ev6") },
+    { "21264a",  ALPHA_CPU_TYPE_NAME("ev67") },
 };
 
 static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
@@ -145,7 +142,7 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
         }
     }
 
-    typename = g_strdup_printf("%s-" TYPE_ALPHA_CPU, cpu_model);
+    typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && object_class_is_abstract(oc)) {
@@ -155,7 +152,7 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
     /* TODO: remove match everything nonsense */
     /* Default to ev67; no reason not to emulate insns by default. */
     if (!oc) {
-        oc = object_class_by_name(TYPE("ev67"));
+        oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
     }
 
     return oc;
@@ -169,12 +166,6 @@ static void ev4_cpu_initfn(Object *obj)
     env->implver = IMPLVER_2106x;
 }
 
-static const TypeInfo ev4_cpu_type_info = {
-    .name = TYPE("ev4"),
-    .parent = TYPE_ALPHA_CPU,
-    .instance_init = ev4_cpu_initfn,
-};
-
 static void ev5_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -183,12 +174,6 @@ static void ev5_cpu_initfn(Object *obj)
     env->implver = IMPLVER_21164;
 }
 
-static const TypeInfo ev5_cpu_type_info = {
-    .name = TYPE("ev5"),
-    .parent = TYPE_ALPHA_CPU,
-    .instance_init = ev5_cpu_initfn,
-};
-
 static void ev56_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -197,12 +182,6 @@ static void ev56_cpu_initfn(Object *obj)
     env->amask |= AMASK_BWX;
 }
 
-static const TypeInfo ev56_cpu_type_info = {
-    .name = TYPE("ev56"),
-    .parent = TYPE("ev5"),
-    .instance_init = ev56_cpu_initfn,
-};
-
 static void pca56_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -211,12 +190,6 @@ static void pca56_cpu_initfn(Object *obj)
     env->amask |= AMASK_MVI;
 }
 
-static const TypeInfo pca56_cpu_type_info = {
-    .name = TYPE("pca56"),
-    .parent = TYPE("ev56"),
-    .instance_init = pca56_cpu_initfn,
-};
-
 static void ev6_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -226,12 +199,6 @@ static void ev6_cpu_initfn(Object *obj)
     env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
 }
 
-static const TypeInfo ev6_cpu_type_info = {
-    .name = TYPE("ev6"),
-    .parent = TYPE_ALPHA_CPU,
-    .instance_init = ev6_cpu_initfn,
-};
-
 static void ev67_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -240,17 +207,6 @@ static void ev67_cpu_initfn(Object *obj)
     env->amask |= AMASK_CIX | AMASK_PREFETCH;
 }
 
-static const TypeInfo ev67_cpu_type_info = {
-    .name = TYPE("ev67"),
-    .parent = TYPE("ev6"),
-    .instance_init = ev67_cpu_initfn,
-};
-
-static const TypeInfo ev68_cpu_type_info = {
-    .name = TYPE("ev68"),
-    .parent = TYPE("ev67"),
-};
-
 static void alpha_cpu_initfn(Object *obj)
 {
     CPUState *cs = CPU(obj);
@@ -302,26 +258,31 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
     cc->gdb_num_core_regs = 67;
 }
 
-static const TypeInfo alpha_cpu_type_info = {
-    .name = TYPE_ALPHA_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(AlphaCPU),
-    .instance_init = alpha_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(AlphaCPUClass),
-    .class_init = alpha_cpu_class_init,
+#define DEFINE_ALPHA_CPU_TYPE(base_type, cpu_model, initfn) \
+     {                                                      \
+         .parent = base_type,                               \
+         .instance_init = initfn,                           \
+         .name = ALPHA_CPU_TYPE_NAME(cpu_model),            \
+     }
+
+static const TypeInfo alpha_cpu_type_infos[] = {
+    {
+        .name = TYPE_ALPHA_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(AlphaCPU),
+        .instance_init = alpha_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(AlphaCPUClass),
+        .class_init = alpha_cpu_class_init,
+    },
+    DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev4", ev4_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev5", ev5_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev5"), "ev56", ev56_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev56"), "pca56",
+                          pca56_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev6", ev6_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev6"), "ev67", ev67_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev67"), "ev68", NULL),
 };
 
-static void alpha_cpu_register_types(void)
-{
-    type_register_static(&alpha_cpu_type_info);
-    type_register_static(&ev4_cpu_type_info);
-    type_register_static(&ev5_cpu_type_info);
-    type_register_static(&ev56_cpu_type_info);
-    type_register_static(&pca56_cpu_type_info);
-    type_register_static(&ev6_cpu_type_info);
-    type_register_static(&ev67_cpu_type_info);
-    type_register_static(&ev68_cpu_type_info);
-}
-
-type_init(alpha_cpu_register_types)
+DEFINE_TYPES(alpha_cpu_type_infos)
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 6ae240969b..0a9ad35f06 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -470,6 +470,9 @@ void alpha_translate_init(void);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_ALPHA_CPU, cpu_model)
 
+#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
+#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
+
 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 527a3448bf..949c7a6e25 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -71,11 +71,11 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
 
 #if defined(CONFIG_USER_ONLY)
     if (strcasecmp(cpu_model, "any") == 0) {
-        return object_class_by_name("crisv32-" TYPE_CRIS_CPU);
+        return object_class_by_name(CRIS_CPU_TYPE_NAME("crisv32"));
     }
 #endif
 
-    typename = g_strdup_printf("%s-" TYPE_CRIS_CPU, cpu_model);
+    typename = g_strdup_printf(CRIS_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) ||
@@ -108,7 +108,7 @@ static void cris_cpu_list_entry(gpointer data, gpointer user_data)
     const char *typename = object_class_get_name(oc);
     char *name;
 
-    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_CRIS_CPU));
+    name = g_strndup(typename, strlen(typename) - strlen(CRIS_CPU_TYPE_SUFFIX));
     (*s->cpu_fprintf)(s->file, "  %s\n", name);
     g_free(name);
 }
@@ -254,38 +254,6 @@ static void crisv32_cpu_class_init(ObjectClass *oc, void *data)
     ccc->vr = 32;
 }
 
-#define TYPE(model) model "-" TYPE_CRIS_CPU
-
-static const TypeInfo cris_cpu_model_type_infos[] = {
-    {
-        .name = TYPE("crisv8"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv8_cpu_class_init,
-    }, {
-        .name = TYPE("crisv9"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv9_cpu_class_init,
-    }, {
-        .name = TYPE("crisv10"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv10_cpu_class_init,
-    }, {
-        .name = TYPE("crisv11"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv11_cpu_class_init,
-    }, {
-        .name = TYPE("crisv17"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv17_cpu_class_init,
-    }, {
-        .name = TYPE("crisv32"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv32_cpu_class_init,
-    }
-};
-
-#undef TYPE
-
 static void cris_cpu_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
@@ -320,24 +288,29 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
     cc->tcg_initialize = cris_initialize_tcg;
 }
 
-static const TypeInfo cris_cpu_type_info = {
-    .name = TYPE_CRIS_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(CRISCPU),
-    .instance_init = cris_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(CRISCPUClass),
-    .class_init = cris_cpu_class_init,
-};
+#define DEFINE_CRIS_CPU_TYPE(cpu_model, initfn) \
+     {                                          \
+         .parent = TYPE_CRIS_CPU,               \
+         .class_init = initfn,                  \
+         .name = CRIS_CPU_TYPE_NAME(cpu_model), \
+     }
 
-static void cris_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&cris_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(cris_cpu_model_type_infos); i++) {
-        type_register_static(&cris_cpu_model_type_infos[i]);
-    }
-}
+static const TypeInfo cris_cpu_model_type_infos[] = {
+    {
+        .name = TYPE_CRIS_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(CRISCPU),
+        .instance_init = cris_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(CRISCPUClass),
+        .class_init = cris_cpu_class_init,
+    },
+    DEFINE_CRIS_CPU_TYPE("crisv8", crisv8_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv9", crisv9_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv10", crisv10_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv11", crisv11_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv17", crisv17_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv32", crisv32_cpu_class_init),
+};
 
-type_init(cris_cpu_register_types)
+DEFINE_TYPES(cris_cpu_model_type_infos)
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 5d822dee16..b64fa3542c 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -269,6 +269,9 @@ enum {
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_CRIS_CPU, cpu_model)
 
+#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
+#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
+
 #define cpu_signal_handler cpu_cris_signal_handler
 
 /* MMU modes definitions */
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index 7f3a292f2b..6f5c14767b 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -51,7 +51,7 @@ static void lm32_cpu_list_entry(gpointer data, gpointer user_data)
     const char *typename = object_class_get_name(oc);
     char *name;
 
-    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_LM32_CPU));
+    name = g_strndup(typename, strlen(typename) - strlen(LM32_CPU_TYPE_SUFFIX));
     (*s->cpu_fprintf)(s->file, "  %s\n", name);
     g_free(name);
 }
@@ -215,32 +215,12 @@ static void lm32_full_cpu_initfn(Object *obj)
                   | LM32_FEATURE_CYCLE_COUNT;
 }
 
-typedef struct LM32CPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-} LM32CPUInfo;
-
-static const LM32CPUInfo lm32_cpus[] = {
-    {
-        .name = "lm32-basic",
-        .initfn = lm32_basic_cpu_initfn,
-    },
-    {
-        .name = "lm32-standard",
-        .initfn = lm32_standard_cpu_initfn,
-    },
-    {
-        .name = "lm32-full",
-        .initfn = lm32_full_cpu_initfn,
-    },
-};
-
 static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_LM32_CPU, cpu_model);
+    typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
@@ -283,36 +263,26 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
     cc->tcg_initialize = lm32_translate_init;
 }
 
-static void lm32_register_cpu_type(const LM32CPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_LM32_CPU,
-        .instance_init = info->initfn,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_LM32_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
+#define DEFINE_LM32_CPU_TYPE(cpu_model, initfn) \
+    { \
+        .parent = TYPE_LM32_CPU, \
+        .name = LM32_CPU_TYPE_NAME(cpu_model), \
+        .instance_init = initfn, \
+    }
 
-static const TypeInfo lm32_cpu_type_info = {
-    .name = TYPE_LM32_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(LM32CPU),
-    .instance_init = lm32_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(LM32CPUClass),
-    .class_init = lm32_cpu_class_init,
+static const TypeInfo lm32_cpus_type_infos[] = {
+    { /* base class should be registered first */
+         .name = TYPE_LM32_CPU,
+         .parent = TYPE_CPU,
+         .instance_size = sizeof(LM32CPU),
+         .instance_init = lm32_cpu_initfn,
+         .abstract = true,
+         .class_size = sizeof(LM32CPUClass),
+         .class_init = lm32_cpu_class_init,
+    },
+    DEFINE_LM32_CPU_TYPE("lm32-basic", lm32_basic_cpu_initfn),
+    DEFINE_LM32_CPU_TYPE("lm32-standard", lm32_standard_cpu_initfn),
+    DEFINE_LM32_CPU_TYPE("lm32-full", lm32_full_cpu_initfn),
 };
 
-static void lm32_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&lm32_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(lm32_cpus); i++) {
-        lm32_register_cpu_type(&lm32_cpus[i]);
-    }
-}
-
-type_init(lm32_cpu_register_types)
+DEFINE_TYPES(lm32_cpus_type_infos)
diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
index de265b50d1..2279594f40 100644
--- a/target/lm32/cpu.h
+++ b/target/lm32/cpu.h
@@ -257,6 +257,9 @@ bool lm32_cpu_do_semihosting(CPUState *cs);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model)
 
+#define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU
+#define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX
+
 #define cpu_list lm32_cpu_list
 #define cpu_signal_handler cpu_lm32_signal_handler
 
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 5da19e570b..0a3dd83548 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -87,7 +87,7 @@ static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model);
+    typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
@@ -202,23 +202,6 @@ static void any_cpu_initfn(Object *obj)
     m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
 }
 
-typedef struct M68kCPUInfo {
-    const char *name;
-    void (*instance_init)(Object *obj);
-} M68kCPUInfo;
-
-static const M68kCPUInfo m68k_cpus[] = {
-    { .name = "m68000", .instance_init = m68000_cpu_initfn },
-    { .name = "m68020", .instance_init = m68020_cpu_initfn },
-    { .name = "m68030", .instance_init = m68030_cpu_initfn },
-    { .name = "m68040", .instance_init = m68040_cpu_initfn },
-    { .name = "m68060", .instance_init = m68060_cpu_initfn },
-    { .name = "m5206", .instance_init = m5206_cpu_initfn },
-    { .name = "m5208", .instance_init = m5208_cpu_initfn },
-    { .name = "cfv4e", .instance_init = cfv4e_cpu_initfn },
-    { .name = "any",   .instance_init = any_cpu_initfn },
-};
-
 static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
@@ -290,36 +273,32 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
     dc->vmsd = &vmstate_m68k_cpu;
 }
 
-static void register_cpu_type(const M68kCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_M68K_CPU,
-        .instance_init = info->instance_init,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
+#define DEFINE_M68K_CPU_TYPE(cpu_model, initfn) \
+    {                                           \
+        .name = M68K_CPU_TYPE_NAME(cpu_model),  \
+        .instance_init = initfn,                \
+        .parent = TYPE_M68K_CPU,                \
+    }
 
-static const TypeInfo m68k_cpu_type_info = {
-    .name = TYPE_M68K_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(M68kCPU),
-    .instance_init = m68k_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(M68kCPUClass),
-    .class_init = m68k_cpu_class_init,
+static const TypeInfo m68k_cpus_type_infos[] = {
+    { /* base class should be registered first */
+        .name = TYPE_M68K_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(M68kCPU),
+        .instance_init = m68k_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(M68kCPUClass),
+        .class_init = m68k_cpu_class_init,
+    },
+    DEFINE_M68K_CPU_TYPE("m68000", m68000_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68020", m68020_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68030", m68030_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68040", m68040_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68060", m68060_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m5206", m5206_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m5208", m5208_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("cfv4e", cfv4e_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("any", any_cpu_initfn),
 };
 
-static void m68k_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&m68k_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) {
-        register_cpu_type(&m68k_cpus[i]);
-    }
-}
-
-type_init(m68k_cpu_register_types)
+DEFINE_TYPES(m68k_cpus_type_infos)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index d9365476e5..afae5f68ac 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -323,6 +323,9 @@ void register_m68k_insns (CPUM68KState *env);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_M68K_CPU, cpu_model)
 
+#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
+#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_m68k_signal_handler
 #define cpu_list m68k_cpu_list
 
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 80812f3e08..069f93560e 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -154,7 +154,7 @@ static void mips_cpu_initfn(Object *obj)
 
 static char *mips_cpu_type_name(const char *cpu_model)
 {
-    return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model);
+    return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model);
 }
 
 static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 66265e4eb6..7f8ba5ff3e 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -740,8 +740,12 @@ enum {
 int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model)
-bool cpu_supports_cps_smp(const char *cpu_model);
-bool cpu_supports_isa(const char *cpu_model, unsigned int isa);
+
+#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
+#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
+
+bool cpu_supports_cps_smp(const char *cpu_type);
+bool cpu_supports_isa(const char *cpu_type, unsigned int isa);
 void cpu_set_exception_base(int vp_index, target_ulong address);
 
 /* mips_int.c */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index d0690f7df6..b022f840c9 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20512,24 +20512,16 @@ void cpu_mips_realize_env(CPUMIPSState *env)
     mvp_init(env, env->cpu_model);
 }
 
-bool cpu_supports_cps_smp(const char *cpu_model)
+bool cpu_supports_cps_smp(const char *cpu_type)
 {
-    const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
-    if (!def) {
-        return false;
-    }
-
-    return (def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0;
+    const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type));
+    return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0;
 }
 
-bool cpu_supports_isa(const char *cpu_model, unsigned int isa)
+bool cpu_supports_isa(const char *cpu_type, unsigned int isa)
 {
-    const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
-    if (!def) {
-        return false;
-    }
-
-    return (def->insn_flags & isa) != 0;
+    const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type));
+    return (mcc->cpu_def->insn_flags & isa) != 0;
 }
 
 void cpu_set_exception_base(int vp_index, target_ulong address)
diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
index 8bbded46c4..c7ba6ee5f9 100644
--- a/target/mips/translate_init.c
+++ b/target/mips/translate_init.c
@@ -755,18 +755,6 @@ const mips_def_t mips_defs[] =
 };
 const int mips_defs_number = ARRAY_SIZE(mips_defs);
 
-static const mips_def_t *cpu_mips_find_by_name (const char *name)
-{
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(mips_defs); i++) {
-        if (strcasecmp(name, mips_defs[i].name) == 0) {
-            return &mips_defs[i];
-        }
-    }
-    return NULL;
-}
-
 void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf)
 {
     int i;
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 24ab3f3708..f1389e5097 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -83,7 +83,12 @@ static void moxie_cpu_initfn(Object *obj)
 
 static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
 {
-    ObjectClass *oc = object_class_by_name(cpu_model);
+    ObjectClass *oc;
+    char *typename;
+
+    typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model);
+    oc = object_class_by_name(typename);
+    g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
                        object_class_is_abstract(oc))) {
         return NULL;
@@ -129,46 +134,24 @@ static void moxie_any_initfn(Object *obj)
     /* Set cpu feature flags */
 }
 
-typedef struct MoxieCPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-} MoxieCPUInfo;
-
-static const MoxieCPUInfo moxie_cpus[] = {
-    { .name = "MoxieLite",      .initfn = moxielite_initfn },
-    { .name = "any",            .initfn = moxie_any_initfn },
-};
+#define DEFINE_MOXIE_CPU_TYPE(cpu_model, initfn) \
+    {                                            \
+        .parent = TYPE_MOXIE_CPU,                \
+        .instance_init = initfn,                 \
+        .name = MOXIE_CPU_TYPE_NAME(cpu_model),  \
+    }
 
-static void cpu_register(const MoxieCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_MOXIE_CPU,
+static const TypeInfo moxie_cpus_type_infos[] = {
+    { /* base class should be registered first */
+        .name = TYPE_MOXIE_CPU,
+        .parent = TYPE_CPU,
         .instance_size = sizeof(MoxieCPU),
-        .instance_init = info->initfn,
+        .instance_init = moxie_cpu_initfn,
         .class_size = sizeof(MoxieCPUClass),
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_MOXIE_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
-
-static const TypeInfo moxie_cpu_type_info = {
-    .name = TYPE_MOXIE_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(MoxieCPU),
-    .instance_init = moxie_cpu_initfn,
-    .class_size = sizeof(MoxieCPUClass),
-    .class_init = moxie_cpu_class_init,
+        .class_init = moxie_cpu_class_init,
+    },
+    DEFINE_MOXIE_CPU_TYPE("MoxieLite", moxielite_initfn),
+    DEFINE_MOXIE_CPU_TYPE("any", moxie_any_initfn),
 };
 
-static void moxie_cpu_register_types(void)
-{
-    int i;
-    type_register_static(&moxie_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(moxie_cpus); i++) {
-        cpu_register(&moxie_cpus[i]);
-    }
-}
-
-type_init(moxie_cpu_register_types)
+DEFINE_TYPES(moxie_cpus_type_infos)
diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index 75decaadd6..d37e6a5572 100644
--- a/target/moxie/cpu.h
+++ b/target/moxie/cpu.h
@@ -122,6 +122,9 @@ int cpu_moxie_signal_handler(int host_signum, void *pinfo,
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_MOXIE_CPU, cpu_model)
 
+#define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
+#define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_moxie_signal_handler
 
 static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index a8db869e50..e0394b8b06 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -101,7 +101,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, cpu_model);
+    typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
@@ -126,16 +126,6 @@ static void openrisc_any_initfn(Object *obj)
     cpu->env.cpucfgr = CPUCFGR_NSGF | CPUCFGR_OB32S | CPUCFGR_EVBARP;
 }
 
-typedef struct OpenRISCCPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-} OpenRISCCPUInfo;
-
-static const OpenRISCCPUInfo openrisc_cpus[] = {
-    { .name = "or1200",      .initfn = or1200_initfn },
-    { .name = "any",         .initfn = openrisc_any_initfn },
-};
-
 static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
 {
     OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
@@ -166,40 +156,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
     cc->tcg_initialize = openrisc_translate_init;
 }
 
-static void cpu_register(const OpenRISCCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_OPENRISC_CPU,
-        .instance_size = sizeof(OpenRISCCPU),
-        .instance_init = info->initfn,
-        .class_size = sizeof(OpenRISCCPUClass),
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
-
-static const TypeInfo openrisc_cpu_type_info = {
-    .name = TYPE_OPENRISC_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(OpenRISCCPU),
-    .instance_init = openrisc_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(OpenRISCCPUClass),
-    .class_init = openrisc_cpu_class_init,
-};
-
-static void openrisc_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&openrisc_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(openrisc_cpus); i++) {
-        cpu_register(&openrisc_cpus[i]);
-    }
-}
-
 /* Sort alphabetically by type name, except for "any". */
 static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b)
 {
@@ -248,4 +204,25 @@ void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf)
     g_slist_free(list);
 }
 
-type_init(openrisc_cpu_register_types)
+#define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \
+    {                                               \
+        .parent = TYPE_OPENRISC_CPU,                \
+        .instance_init = initfn,                    \
+        .name = OPENRISC_CPU_TYPE_NAME(cpu_model),  \
+    }
+
+static const TypeInfo openrisc_cpus_type_infos[] = {
+    { /* base class should be registered first */
+        .name = TYPE_OPENRISC_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(OpenRISCCPU),
+        .instance_init = openrisc_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(OpenRISCCPUClass),
+        .class_init = openrisc_cpu_class_init,
+    },
+    DEFINE_OPENRISC_CPU_TYPE("or1200", or1200_initfn),
+    DEFINE_OPENRISC_CPU_TYPE("any", openrisc_any_initfn),
+};
+
+DEFINE_TYPES(openrisc_cpus_type_infos)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 892dc4210f..cc22dc8871 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -392,6 +392,9 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model)
 
+#define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU
+#define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX
+
 #include "exec/cpu-all.h"
 
 #define TB_FLAGS_DFLAG 1
diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 01abb206e4..0f9fb4dd31 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -24,9 +24,9 @@
 
 #define TYPE_SUPERH_CPU "superh-cpu"
 
-#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
-#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
-#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
+#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r")
+#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r")
+#define TYPE_SH7785_CPU  SUPERH_CPU_TYPE_NAME("sh7785")
 
 #define SUPERH_CPU_CLASS(klass) \
     OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
@@ -39,7 +39,6 @@
  * SuperHCPUClass:
  * @parent_realize: The parent class' realize handler.
  * @parent_reset: The parent class' reset handler.
- * @name: The name.
  * @pvr: Processor Version Register
  * @prr: Processor Revision Register
  * @cvr: Cache Version Register
@@ -54,7 +53,6 @@ typedef struct SuperHCPUClass {
     DeviceRealize parent_realize;
     void (*parent_reset)(CPUState *cpu);
 
-    const char *name;
     uint32_t pvr;
     uint32_t prr;
     uint32_t cvr;
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 89abce2472..e0b99fbc89 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -98,12 +98,11 @@ static gint superh_cpu_list_compare(gconstpointer a, gconstpointer b)
 
 static void superh_cpu_list_entry(gpointer data, gpointer user_data)
 {
-    ObjectClass *oc = data;
-    SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
     SuperHCPUListState *s = user_data;
+    const char *typename = object_class_get_name(OBJECT_CLASS(data));
+    int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
 
-    (*s->cpu_fprintf)(s->file, "%s\n",
-                      scc->name);
+    (*s->cpu_fprintf)(s->file, "%.*s\n", len, typename);
 }
 
 void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
@@ -120,36 +119,26 @@ void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
     g_slist_free(list);
 }
 
-static gint superh_cpu_name_compare(gconstpointer a, gconstpointer b)
-{
-    const SuperHCPUClass *scc = SUPERH_CPU_CLASS(a);
-    const char *name = b;
-
-    return strcasecmp(scc->name, name);
-}
-
 static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
-    GSList *list, *item;
+    char *s, *typename = NULL;
 
-    if (strcasecmp(cpu_model, "any") == 0) {
-        return object_class_by_name(TYPE_SH7750R_CPU);
+    s = g_ascii_strdown(cpu_model, -1);
+    if (strcmp(s, "any") == 0) {
+        oc = object_class_by_name(TYPE_SH7750R_CPU);
+        goto out;
     }
 
-    oc = object_class_by_name(cpu_model);
-    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_SUPERH_CPU) != NULL
-        && !object_class_is_abstract(oc)) {
-        return oc;
+    typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s);
+    oc = object_class_by_name(typename);
+    if (oc != NULL && object_class_is_abstract(oc)) {
+        oc = NULL;
     }
 
-    oc = NULL;
-    list = object_class_get_list(TYPE_SUPERH_CPU, false);
-    item = g_slist_find_custom(list, cpu_model, superh_cpu_name_compare);
-    if (item != NULL) {
-        oc = item->data;
-    }
-    g_slist_free(list);
+out:
+    g_free(s);
+    g_free(typename);
     return oc;
 }
 
@@ -166,19 +155,11 @@ static void sh7750r_class_init(ObjectClass *oc, void *data)
 {
     SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
 
-    scc->name = "SH7750R";
     scc->pvr = 0x00050000;
     scc->prr = 0x00000100;
     scc->cvr = 0x00110000;
 }
 
-static const TypeInfo sh7750r_type_info = {
-    .name = TYPE_SH7750R_CPU,
-    .parent = TYPE_SUPERH_CPU,
-    .class_init = sh7750r_class_init,
-    .instance_init = sh7750r_cpu_initfn,
-};
-
 static void sh7751r_cpu_initfn(Object *obj)
 {
     SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -192,19 +173,11 @@ static void sh7751r_class_init(ObjectClass *oc, void *data)
 {
     SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
 
-    scc->name = "SH7751R";
     scc->pvr = 0x04050005;
     scc->prr = 0x00000113;
     scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
 }
 
-static const TypeInfo sh7751r_type_info = {
-    .name = TYPE_SH7751R_CPU,
-    .parent = TYPE_SUPERH_CPU,
-    .class_init = sh7751r_class_init,
-    .instance_init = sh7751r_cpu_initfn,
-};
-
 static void sh7785_cpu_initfn(Object *obj)
 {
     SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -218,19 +191,11 @@ static void sh7785_class_init(ObjectClass *oc, void *data)
 {
     SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
 
-    scc->name = "SH7785";
     scc->pvr = 0x10300700;
     scc->prr = 0x00000200;
     scc->cvr = 0x71440211;
 }
 
-static const TypeInfo sh7785_type_info = {
-    .name = TYPE_SH7785_CPU,
-    .parent = TYPE_SUPERH_CPU,
-    .class_init = sh7785_class_init,
-    .instance_init = sh7785_cpu_initfn,
-};
-
 static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
@@ -300,22 +265,30 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
     dc->vmsd = &vmstate_sh_cpu;
 }
 
-static const TypeInfo superh_cpu_type_info = {
-    .name = TYPE_SUPERH_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(SuperHCPU),
-    .instance_init = superh_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(SuperHCPUClass),
-    .class_init = superh_cpu_class_init,
-};
+#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \
+    {                                                    \
+        .name = type_name,                               \
+        .parent = TYPE_SUPERH_CPU,                       \
+        .class_init = cinit,                             \
+        .instance_init = initfn,                         \
+    }
+static const TypeInfo superh_cpu_type_infos[] = {
+    {
+        .name = TYPE_SUPERH_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(SuperHCPU),
+        .instance_init = superh_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(SuperHCPUClass),
+        .class_init = superh_cpu_class_init,
+    },
+    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init,
+                           sh7750r_cpu_initfn),
+    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init,
+                           sh7751r_cpu_initfn),
+    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init,
+                           sh7785_cpu_initfn),
 
-static void superh_cpu_register_types(void)
-{
-    type_register_static(&superh_cpu_type_info);
-    type_register_static(&sh7750r_type_info);
-    type_register_static(&sh7751r_type_info);
-    type_register_static(&sh7785_type_info);
-}
+};
 
-type_init(superh_cpu_register_types)
+DEFINE_TYPES(superh_cpu_type_infos)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 123f34783a..960b46870d 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -274,6 +274,9 @@ void cpu_load_tlb(CPUSH4State * env);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)
 
+#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
+#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_sh4_signal_handler
 #define cpu_list sh4_cpu_list
 
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 47d0927707..c7adc281de 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -712,7 +712,7 @@ static bool sparc_cpu_has_work(CPUState *cs)
 
 static char *sparc_cpu_type_name(const char *cpu_model)
 {
-    char *name = g_strdup_printf("%s-" TYPE_SPARC_CPU, cpu_model);
+    char *name = g_strdup_printf(SPARC_CPU_TYPE_NAME("%s"), cpu_model);
     char *s = name;
 
     /* SPARC cpu model names happen to have whitespaces,
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index bf2b8931cc..9fde547fac 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -658,6 +658,9 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_SPARC_CPU, cpu_model)
 #endif
 
+#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
+#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_sparc_signal_handler
 #define cpu_list sparc_cpu_list
 
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index cd93806d47..179c997aa4 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -116,7 +116,7 @@ static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_TRICORE_CPU, cpu_model);
+    typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
@@ -147,19 +147,6 @@ static void tc27x_initfn(Object *obj)
     set_feature(&cpu->env, TRICORE_FEATURE_161);
 }
 
-typedef struct TriCoreCPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-    void (*class_init)(ObjectClass *oc, void *data);
-} TriCoreCPUInfo;
-
-static const TriCoreCPUInfo tricore_cpus[] = {
-    { .name = "tc1796",      .initfn = tc1796_initfn },
-    { .name = "tc1797",      .initfn = tc1797_initfn },
-    { .name = "tc27x",       .initfn = tc27x_initfn },
-    { .name = NULL }
-};
-
 static void tricore_cpu_class_init(ObjectClass *c, void *data)
 {
     TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c);
@@ -181,41 +168,26 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
     cc->tcg_initialize = tricore_tcg_init;
 }
 
-static void cpu_register(const TriCoreCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_TRICORE_CPU,
+#define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
+    {                                              \
+        .parent = TYPE_TRICORE_CPU,                \
+        .instance_init = initfn,                   \
+        .name = TRICORE_CPU_TYPE_NAME(cpu_model),  \
+    }
+
+static const TypeInfo tricore_cpu_type_infos[] = {
+    {
+        .name = TYPE_TRICORE_CPU,
+        .parent = TYPE_CPU,
         .instance_size = sizeof(TriCoreCPU),
-        .instance_init = info->initfn,
+        .instance_init = tricore_cpu_initfn,
+        .abstract = true,
         .class_size = sizeof(TriCoreCPUClass),
-        .class_init = info->class_init,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_TRICORE_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
-
-static const TypeInfo tricore_cpu_type_info = {
-    .name = TYPE_TRICORE_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(TriCoreCPU),
-    .instance_init = tricore_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(TriCoreCPUClass),
-    .class_init = tricore_cpu_class_init,
+        .class_init = tricore_cpu_class_init,
+    },
+    DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn),
+    DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn),
+    DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn),
 };
 
-static void tricore_cpu_register_types(void)
-{
-    const TriCoreCPUInfo *info = tricore_cpus;
-
-    type_register_static(&tricore_cpu_type_info);
-
-    while (info->name) {
-        cpu_register(info);
-        info++;
-    }
-}
-
-type_init(tricore_cpu_register_types)
+DEFINE_TYPES(tricore_cpu_type_infos)
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index bc53c40774..f41d2ceb69 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -413,6 +413,8 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, target_ulong *pc,
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_TRICORE_CPU, cpu_model)
 
+#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
+#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
 
 /* helpers.c */
 int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address,
diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
index 526604ff78..17dc1504d7 100644
--- a/target/unicore32/cpu.c
+++ b/target/unicore32/cpu.c
@@ -44,7 +44,7 @@ static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, cpu_model);
+    typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
@@ -54,11 +54,6 @@ static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
     return oc;
 }
 
-typedef struct UniCore32CPUInfo {
-    const char *name;
-    void (*instance_init)(Object *obj);
-} UniCore32CPUInfo;
-
 static void unicore_ii_cpu_initfn(Object *obj)
 {
     UniCore32CPU *cpu = UNICORE32_CPU(obj);
@@ -90,11 +85,6 @@ static void uc32_any_cpu_initfn(Object *obj)
     set_snan_bit_is_one(1, &env->ucf64.fp_status);
 }
 
-static const UniCore32CPUInfo uc32_cpus[] = {
-    { .name = "UniCore-II", .instance_init = unicore_ii_cpu_initfn },
-    { .name = "any",        .instance_init = uc32_any_cpu_initfn },
-};
-
 static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
@@ -160,36 +150,25 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
     dc->vmsd = &vmstate_uc32_cpu;
 }
 
-static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_UNICORE32_CPU,
-        .instance_init = info->instance_init,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
+#define DEFINE_UNICORE32_CPU_TYPE(cpu_model, initfn) \
+    {                                                \
+        .parent = TYPE_UNICORE32_CPU,                \
+        .instance_init = initfn,                     \
+        .name = UNICORE32_CPU_TYPE_NAME(cpu_model),  \
+    }
 
-static const TypeInfo uc32_cpu_type_info = {
-    .name = TYPE_UNICORE32_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(UniCore32CPU),
-    .instance_init = uc32_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(UniCore32CPUClass),
-    .class_init = uc32_cpu_class_init,
+static const TypeInfo uc32_cpu_type_infos[] = {
+    {
+        .name = TYPE_UNICORE32_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(UniCore32CPU),
+        .instance_init = uc32_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(UniCore32CPUClass),
+        .class_init = uc32_cpu_class_init,
+    },
+    DEFINE_UNICORE32_CPU_TYPE("UniCore-II", unicore_ii_cpu_initfn),
+    DEFINE_UNICORE32_CPU_TYPE("any", uc32_any_cpu_initfn),
 };
 
-static void uc32_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&uc32_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(uc32_cpus); i++) {
-        uc32_register_cpu_type(&uc32_cpus[i]);
-    }
-}
-
-type_init(uc32_cpu_register_types)
+DEFINE_TYPES(uc32_cpu_type_infos)
diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h
index 7724108281..3dc6fbc6c7 100644
--- a/target/unicore32/cpu.h
+++ b/target/unicore32/cpu.h
@@ -167,6 +167,9 @@ static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch)
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model)
 
+#define UNICORE32_CPU_TYPE_SUFFIX "-" TYPE_UNICORE32_CPU
+#define UNICORE32_CPU_TYPE_NAME(model) model UNICORE32_CPU_TYPE_SUFFIX
+
 static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong *pc,
                                         target_ulong *cs_base, uint32_t *flags)
 {
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index a5651e5dab..91961789a5 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -83,7 +83,7 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_XTENSA_CPU, cpu_model);
+    typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 48033313c5..b17d7d96e9 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -469,11 +469,15 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
 #define cpu_signal_handler cpu_xtensa_signal_handler
 #define cpu_list xtensa_cpu_list
 
+#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
+#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
+
 #ifdef TARGET_WORDS_BIGENDIAN
 #define XTENSA_DEFAULT_CPU_MODEL "fsf"
 #else
 #define XTENSA_DEFAULT_CPU_MODEL "dc232b"
 #endif
+#define XTENSA_DEFAULT_CPU_TYPE XTENSA_CPU_TYPE_NAME(XTENSA_DEFAULT_CPU_MODEL)
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model)
 
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index e8fba20918..216f1988aa 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -76,7 +76,7 @@ void xtensa_register_core(XtensaConfigList *node)
 
     node->next = xtensa_cores;
     xtensa_cores = node;
-    type.name = g_strdup_printf("%s-" TYPE_XTENSA_CPU, node->config->name);
+    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), node->config->name);
     type_register(&type);
     g_free((gpointer)type.name);
 }