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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-02-01 10:05:41 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-02-01 10:05:41 +0000
commitc896fe29d6c8ae6cde3917727812ced3f2e536a4 (patch)
treea8536077171bbe49b59f00734500627032289364 /tcg/TODO
parent56abbcfff3f0073bf616be7af20106e51e78bd22 (diff)
downloadqemu-c896fe29d6c8ae6cde3917727812ced3f2e536a4.tar.gz
TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3943 c046a42c-6fe2-441c-8c8c-71466251a162
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+- test macro system
+
+- test conditional jumps
+
+- test mul, div, ext8s, ext16s, bswap
+
+- generate a global TB prologue and epilogue to save/restore registers
+ to/from the CPU state and to reserve a stack frame to optimize
+ helper calls. Modify cpu-exec.c so that it does not use global
+ register variables (except maybe for 'env').
+
+- fully convert the x86 target. The minimal amount of work includes:
+ - add cc_src, cc_dst and cc_op as globals
+ - disable its eflags optimization (the liveness analysis should
+ suffice)
+ - move complicated operations to helpers (in particular FPU, SSE, MMX).
+
+- optimize the x86 target:
+ - move some or all the registers as globals
+ - use the TB prologue and epilogue to have QEMU target registers in
+ pre assigned host registers.
+
+Ideas:
+
+- Move the slow part of the qemu_ld/st ops after the end of the TB.
+
+- Experiment: change instruction storage to simplify macro handling
+ and to handle dynamic allocation and see if the translation speed is
+ OK.
+
+- change exception syntax to get closer to QOP system (exception
+ parameters given with a specific instruction).