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authorBlue Swirl <blauwirbel@gmail.com>2011-05-15 16:03:25 +0000
committerBlue Swirl <blauwirbel@gmail.com>2011-06-26 18:25:38 +0000
commitcea5f9a28faa528b6b1b117c9ab2d8828f473fef (patch)
treeabf539721ee3427a35c8b60194cd2b73b57ce254 /tcg/arm
parent2b41f10e186ccb4f0058815161586f8d6d006ea3 (diff)
downloadqemu-cea5f9a28faa528b6b1b117c9ab2d8828f473fef.tar.gz
cpu-exec.c: avoid AREG0 use
Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/arm')
-rw-r--r--tcg/arm/tcg-target.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index fb858d8634..457ad7edf8 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1846,15 +1846,18 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type,
static void tcg_target_qemu_prologue(TCGContext *s)
{
- /* There is no need to save r7, it is used to store the address
- of the env structure and is not modified by GCC. */
+ /* Calling convention requires us to save r4-r11 and lr;
+ * save also r12 to maintain stack 8-alignment.
+ */
+
+ /* stmdb sp!, { r4 - r12, lr } */
+ tcg_out32(s, (COND_AL << 28) | 0x092d5ff0);
- /* stmdb sp!, { r4 - r6, r8 - r11, lr } */
- tcg_out32(s, (COND_AL << 28) | 0x092d4f70);
+ tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
- tcg_out_bx(s, COND_AL, TCG_REG_R0);
+ tcg_out_bx(s, COND_AL, tcg_target_call_iarg_regs[1]);
tb_ret_addr = s->code_ptr;
- /* ldmia sp!, { r4 - r6, r8 - r11, pc } */
- tcg_out32(s, (COND_AL << 28) | 0x08bd8f70);
+ /* ldmia sp!, { r4 - r12, pc } */
+ tcg_out32(s, (COND_AL << 28) | 0x08bd9ff0);
}