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authorAurelien Jarno <aurelien@aurel32.net>2012-09-21 18:20:26 +0200
committerAurelien Jarno <aurelien@aurel32.net>2012-09-22 15:10:20 +0200
commit04f71aa3fd002d8c3aeb6db72a9219e1a8b3fef4 (patch)
tree27501f3c1d97371e2fc7e36b872519f7961ab412 /tcg/mips/tcg-target.h
parent9a152519a9f767297c92b5840c91a22235295c8d (diff)
downloadqemu-04f71aa3fd002d8c3aeb6db72a9219e1a8b3fef4.tar.gz
tcg/mips: implement deposit op on MIPS32R2
deposit operations can be optimized on MIPS32 Release 2 using the INS instruction. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/mips/tcg-target.h')
-rw-r--r--tcg/mips/tcg-target.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 470314cc99..897a737ccc 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -86,7 +86,6 @@ typedef enum {
#define TCG_TARGET_HAS_orc_i32 0
#define TCG_TARGET_HAS_eqv_i32 0
#define TCG_TARGET_HAS_nand_i32 0
-#define TCG_TARGET_HAS_deposit_i32 0
#define TCG_TARGET_HAS_movcond_i32 0
/* optional instructions only implemented on MIPS32R2 */
@@ -94,10 +93,12 @@ typedef enum {
#define TCG_TARGET_HAS_bswap16_i32 1
#define TCG_TARGET_HAS_bswap32_i32 1
#define TCG_TARGET_HAS_rot_i32 1
+#define TCG_TARGET_HAS_deposit_i32 1
#else
#define TCG_TARGET_HAS_bswap16_i32 0
#define TCG_TARGET_HAS_bswap32_i32 0
#define TCG_TARGET_HAS_rot_i32 0
+#define TCG_TARGET_HAS_deposit_i32 0
#endif
/* optional instructions automatically implemented */