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| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-26 17:19:35 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-26 17:19:35 +0000 |
| commit | e97b640d471ed15bc35ce4784c2d93eb369d3ba0 (patch) | |
| tree | c373dad5c8ce9c75909e9d21f5439ba25a5ea621 /tcg/sparc/tcg-target.h | |
| parent | 2991990b18cda88cefc726599ac2fe034231a75a (diff) | |
| download | qemu-e97b640d471ed15bc35ce4784c2d93eb369d3ba0.tar.gz | |
Try to avoid glibc global register mangling, again
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4953 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/sparc/tcg-target.h')
| -rw-r--r-- | tcg/sparc/tcg-target.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 4a0c831d2b..ea99c888c5 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -72,14 +72,15 @@ enum { #define TCG_CT_CONST_S13 0x200 /* used for function call generation */ -#define TCG_REG_CALL_STACK TCG_REG_O6 +#define TCG_REG_CALL_STACK TCG_REG_I6 #ifdef __arch64__ -#define TCG_TARGET_STACK_MINFRAME 176 -#define TCG_TARGET_CALL_STACK_OFFSET (2047 + 176) +// Reserve space for AREG0 +#define TCG_TARGET_STACK_MINFRAME (176 + 2 * sizeof(long)) +#define TCG_TARGET_CALL_STACK_OFFSET (2047 + TCG_TARGET_STACK_MINFRAME) #define TCG_TARGET_STACK_ALIGN 16 #else -#define TCG_TARGET_STACK_MINFRAME 92 -#define TCG_TARGET_CALL_STACK_OFFSET 92 +#define TCG_TARGET_STACK_MINFRAME (92 + 2 * sizeof(long)) +#define TCG_TARGET_CALL_STACK_OFFSET TCG_TARGET_STACK_MINFRAME #define TCG_TARGET_STACK_ALIGN 8 #endif @@ -90,7 +91,7 @@ enum { //#define TCG_TARGET_HAS_neg_i64 -/* Note: must be synced with dyngen-exec.h */ +/* Note: must be synced with dyngen-exec.h and Makefile.target */ #ifdef HOST_SOLARIS #define TCG_AREG0 TCG_REG_G2 #define TCG_AREG1 TCG_REG_G3 @@ -98,10 +99,9 @@ enum { #define TCG_AREG3 TCG_REG_G5 #define TCG_AREG4 TCG_REG_G6 #elif defined(__sparc_v9__) -#define TCG_AREG0 TCG_REG_G1 -#define TCG_AREG1 TCG_REG_G4 -#define TCG_AREG2 TCG_REG_G5 -#define TCG_AREG3 TCG_REG_G7 +#define TCG_AREG0 TCG_REG_G5 +#define TCG_AREG1 TCG_REG_G6 +#define TCG_AREG2 TCG_REG_G7 #else #define TCG_AREG0 TCG_REG_G6 #define TCG_AREG1 TCG_REG_G1 |