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| author | Sergey Sorokin <afarallax@yandex.ru> | 2016-06-23 21:16:46 +0300 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2016-07-05 20:50:13 -0700 |
| commit | 1f00b27f17518a1bcb4cedca49eaec96a4d560bd (patch) | |
| tree | 90abe3fc60c60ce9ff0aa5c46a87c5589ff55229 /tcg/tcg-op.c | |
| parent | 59d7c14eeff8d2ad7f61aed86ce5a176113bc153 (diff) | |
| download | qemu-1f00b27f17518a1bcb4cedca49eaec96a4d560bd.tar.gz | |
tcg: Improve the alignment check infrastructure
Some architectures (e.g. ARMv8) need the address which is aligned
to a size more than the size of the memory access.
To support such check it's enough the current costless alignment
check implementation in QEMU, but we need to support
an alignment size specifying.
Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-Id: <1466705806-679898-1-git-send-email-afarallax@yandex.ru>
Signed-off-by: Richard Henderson <rth@twiddle.net>
[rth: Assert in tcg_canonicalize_memop. Leave get_alignment_bits
available for, though unused by, user-mode. Retain logging difference
based on ALIGNED_ONLY.]
Diffstat (limited to 'tcg/tcg-op.c')
| -rw-r--r-- | tcg/tcg-op.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 569cdc642e..293b854370 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1851,6 +1851,9 @@ void tcg_gen_goto_tb(unsigned idx) static inline TCGMemOp tcg_canonicalize_memop(TCGMemOp op, bool is64, bool st) { + /* Trigger the asserts within as early as possible. */ + (void)get_alignment_bits(op); + switch (op & MO_SIZE) { case MO_8: op &= ~MO_BSWAP; |