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| author | Petar Jovanovic <petarj@mips.com> | 2012-12-05 00:29:10 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2012-12-06 08:12:14 +0100 |
| commit | 19e6c50d2d843220efbdd3b2db21d83c122c364a (patch) | |
| tree | 1ab4c57927dad1533eb0235c3b92f3293d62ef9e /tests/tcg | |
| parent | 34f5606ee101f82a247d09d05644ad2a63c8e342 (diff) | |
| download | qemu-19e6c50d2d843220efbdd3b2db21d83c122c364a.tar.gz | |
target-mips: Fix incorrect shift for SHILO and SHILOV
helper_shilo has not been shifting an accumulator value correctly for negative
values in 'shift' field. Minor optimization for shift=0 case.
This change also adds tests that will trigger issue and check for regressions.
Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tests/tcg')
| -rw-r--r-- | tests/tcg/mips/mips32-dsp/shilo.c | 18 | ||||
| -rw-r--r-- | tests/tcg/mips/mips32-dsp/shilov.c | 20 |
2 files changed, 38 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips32-dsp/shilo.c b/tests/tcg/mips/mips32-dsp/shilo.c index b686616d80..ce8ebc69c2 100644 --- a/tests/tcg/mips/mips32-dsp/shilo.c +++ b/tests/tcg/mips/mips32-dsp/shilo.c @@ -23,5 +23,23 @@ int main() assert(ach == resulth); assert(acl == resultl); + + ach = 0x1; + acl = 0x80000000; + + resulth = 0x3; + resultl = 0x0; + + __asm + ("mthi %0, $ac1\n\t" + "mtlo %1, $ac1\n\t" + "shilo $ac1, -1\n\t" + "mfhi %0, $ac1\n\t" + "mflo %1, $ac1\n\t" + : "+r"(ach), "+r"(acl) + ); + assert(ach == resulth); + assert(acl == resultl); + return 0; } diff --git a/tests/tcg/mips/mips32-dsp/shilov.c b/tests/tcg/mips/mips32-dsp/shilov.c index f186032a14..e1d6cea4b6 100644 --- a/tests/tcg/mips/mips32-dsp/shilov.c +++ b/tests/tcg/mips/mips32-dsp/shilov.c @@ -25,5 +25,25 @@ int main() assert(ach == resulth); assert(acl == resultl); + + rs = 0xffffffff; + ach = 0x1; + acl = 0x80000000; + + resulth = 0x3; + resultl = 0x0; + + __asm + ("mthi %0, $ac1\n\t" + "mtlo %1, $ac1\n\t" + "shilov $ac1, %2\n\t" + "mfhi %0, $ac1\n\t" + "mflo %1, $ac1\n\t" + : "+r"(ach), "+r"(acl) + : "r"(rs) + ); + assert(ach == resulth); + assert(acl == resultl); + return 0; } |