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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-06-24 14:01:32 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-06-24 14:01:32 +0000
commit80e7d5210305d1acff06fd59de2982826cb880c7 (patch)
tree5f00475459fc6930b2d12cbe0ce71541d7b61aab /tests
parent13846e700f7415b388f06ef912c772907a95e62e (diff)
downloadqemu-80e7d5210305d1acff06fd59de2982826cb880c7.tar.gz
added movdq2q and movq2dq
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2004 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tests')
-rw-r--r--tests/test-i386.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/tests/test-i386.c b/tests/test-i386.c
index df7c1bf8e3..64802690f4 100644
--- a/tests/test-i386.c
+++ b/tests/test-i386.c
@@ -2199,9 +2199,12 @@ void test_sse_comi(double a1, double b1)
r.q[1], r.q[0]);\
}
+/* Force %xmm0 usage to avoid the case where both register index are 0
+ to test intruction decoding more extensively */
#define CVT_OP_XMM2MMX(op)\
{\
- asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq));\
+ asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq) \
+ : "%xmm0");\
printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
#op,\
a.q[1], a.q[0],\
@@ -2555,6 +2558,10 @@ void test_sse(void)
CVT_OP_XMM(cvtpd2dq);
CVT_OP_XMM(cvttpd2dq);
+ /* sse/mmx moves */
+ CVT_OP_XMM2MMX(movdq2q);
+ CVT_OP_MMX2XMM(movq2dq);
+
/* int to float */
a.l[0] = -6;
a.l[1] = 2;